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| author | Christoph Hellwig <hch@lst.de> | 2018-09-08 12:22:43 +0300 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2018-09-20 10:01:15 +0300 |
| commit | bc3ec75de5452db59b683487867ba562b950708a (patch) | |
| tree | ad93be8bbaea3429f83fb0afd6b7597ec90a1e7b /arch/hexagon | |
| parent | f3ecc0ff0457eae93503792c6fc35921fa8a6204 (diff) | |
| download | linux-bc3ec75de5452db59b683487867ba562b950708a.tar.xz | |
dma-mapping: merge direct and noncoherent ops
All the cache maintainance is already stubbed out when not enabled,
but merging the two allows us to nicely handle the case where
cache maintainance is required for some devices, but not others.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Paul Burton <paul.burton@mips.com> # MIPS parts
Diffstat (limited to 'arch/hexagon')
| -rw-r--r-- | arch/hexagon/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/hexagon/Kconfig b/arch/hexagon/Kconfig index 6cee842a9b44..3ef46522e89f 100644 --- a/arch/hexagon/Kconfig +++ b/arch/hexagon/Kconfig @@ -30,7 +30,7 @@ config HEXAGON select GENERIC_CLOCKEVENTS_BROADCAST select MODULES_USE_ELF_RELA select GENERIC_CPU_DEVICES - select DMA_NONCOHERENT_OPS + select DMA_DIRECT_OPS ---help--- Qualcomm Hexagon is a processor architecture designed for high performance and low power across a wide variety of applications. |