diff options
author | Graf Yang <graf.yang@analog.com> | 2009-01-07 18:14:39 +0300 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2009-01-07 18:14:39 +0300 |
commit | 6b3087c64a92a36ae20d33479b4df6d7afc910d4 (patch) | |
tree | 95984fc623658ebf150d0d912a7f6c5a0301a5a9 /arch/blackfin/include/asm/bitops.h | |
parent | c51b4488cd5bff08ed5690a8f303ff7f0894da2a (diff) | |
download | linux-6b3087c64a92a36ae20d33479b4df6d7afc910d4.tar.xz |
Blackfin arch: SMP supporting patchset: Blackfin header files and machine common code
Blackfin dual core BF561 processor can support SMP like features.
https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like
In this patch, we provide SMP extend to Blackfin header files
and machine common code
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/include/asm/bitops.h')
-rw-r--r-- | arch/blackfin/include/asm/bitops.h | 189 |
1 files changed, 125 insertions, 64 deletions
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h index c428e4106f89..9964e17232e9 100644 --- a/arch/blackfin/include/asm/bitops.h +++ b/arch/blackfin/include/asm/bitops.h @@ -7,7 +7,6 @@ #include <linux/compiler.h> #include <asm/byteorder.h> /* swab32 */ -#include <asm/system.h> /* save_flags */ #ifdef __KERNEL__ @@ -20,36 +19,71 @@ #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/ffz.h> -static __inline__ void set_bit(int nr, volatile unsigned long *addr) +#ifdef CONFIG_SMP + +#include <linux/linkage.h> + +asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr); + +asmlinkage int __raw_bit_clear_asm(volatile unsigned long *addr, int nr); + +asmlinkage int __raw_bit_toggle_asm(volatile unsigned long *addr, int nr); + +asmlinkage int __raw_bit_test_set_asm(volatile unsigned long *addr, int nr); + +asmlinkage int __raw_bit_test_clear_asm(volatile unsigned long *addr, int nr); + +asmlinkage int __raw_bit_test_toggle_asm(volatile unsigned long *addr, int nr); + +asmlinkage int __raw_bit_test_asm(const volatile unsigned long *addr, int nr); + +static inline void set_bit(int nr, volatile unsigned long *addr) { - int *a = (int *)addr; - int mask; - unsigned long flags; + volatile unsigned long *a = addr + (nr >> 5); + __raw_bit_set_asm(a, nr & 0x1f); +} - a += nr >> 5; - mask = 1 << (nr & 0x1f); - local_irq_save(flags); - *a |= mask; - local_irq_restore(flags); +static inline void clear_bit(int nr, volatile unsigned long *addr) +{ + volatile unsigned long *a = addr + (nr >> 5); + __raw_bit_clear_asm(a, nr & 0x1f); } -static __inline__ void __set_bit(int nr, volatile unsigned long *addr) +static inline void change_bit(int nr, volatile unsigned long *addr) { - int *a = (int *)addr; - int mask; + volatile unsigned long *a = addr + (nr >> 5); + __raw_bit_toggle_asm(a, nr & 0x1f); +} - a += nr >> 5; - mask = 1 << (nr & 0x1f); - *a |= mask; +static inline int test_bit(int nr, const volatile unsigned long *addr) +{ + volatile const unsigned long *a = addr + (nr >> 5); + return __raw_bit_test_asm(a, nr & 0x1f) != 0; } -/* - * clear_bit() doesn't provide any barrier for the compiler. - */ -#define smp_mb__before_clear_bit() barrier() -#define smp_mb__after_clear_bit() barrier() +static inline int test_and_set_bit(int nr, volatile unsigned long *addr) +{ + volatile unsigned long *a = addr + (nr >> 5); + return __raw_bit_test_set_asm(a, nr & 0x1f); +} -static __inline__ void clear_bit(int nr, volatile unsigned long *addr) +static inline int test_and_clear_bit(int nr, volatile unsigned long *addr) +{ + volatile unsigned long *a = addr + (nr >> 5); + return __raw_bit_test_clear_asm(a, nr & 0x1f); +} + +static inline int test_and_change_bit(int nr, volatile unsigned long *addr) +{ + volatile unsigned long *a = addr + (nr >> 5); + return __raw_bit_test_toggle_asm(a, nr & 0x1f); +} + +#else /* !CONFIG_SMP */ + +#include <asm/system.h> /* save_flags */ + +static inline void set_bit(int nr, volatile unsigned long *addr) { int *a = (int *)addr; int mask; @@ -57,21 +91,23 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr) a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); - *a &= ~mask; + *a |= mask; local_irq_restore(flags); } -static __inline__ void __clear_bit(int nr, volatile unsigned long *addr) +static inline void clear_bit(int nr, volatile unsigned long *addr) { int *a = (int *)addr; int mask; - + unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); + local_irq_save(flags); *a &= ~mask; + local_irq_restore(flags); } -static __inline__ void change_bit(int nr, volatile unsigned long *addr) +static inline void change_bit(int nr, volatile unsigned long *addr) { int mask, flags; unsigned long *ADDR = (unsigned long *)addr; @@ -83,17 +119,7 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr) local_irq_restore(flags); } -static __inline__ void __change_bit(int nr, volatile unsigned long *addr) -{ - int mask; - unsigned long *ADDR = (unsigned long *)addr; - - ADDR += nr >> 5; - mask = 1 << (nr & 31); - *ADDR ^= mask; -} - -static __inline__ int test_and_set_bit(int nr, void *addr) +static inline int test_and_set_bit(int nr, volatile unsigned long *addr) { int mask, retval; volatile unsigned int *a = (volatile unsigned int *)addr; @@ -109,19 +135,23 @@ static __inline__ int test_and_set_bit(int nr, void *addr) return retval; } -static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr) +static inline int test_and_clear_bit(int nr, volatile unsigned long *addr) { int mask, retval; volatile unsigned int *a = (volatile unsigned int *)addr; + unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); + local_irq_save(flags); retval = (mask & *a) != 0; - *a |= mask; + *a &= ~mask; + local_irq_restore(flags); + return retval; } -static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr) +static inline int test_and_change_bit(int nr, volatile unsigned long *addr) { int mask, retval; volatile unsigned int *a = (volatile unsigned int *)addr; @@ -131,13 +161,50 @@ static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr) mask = 1 << (nr & 0x1f); local_irq_save(flags); retval = (mask & *a) != 0; - *a &= ~mask; + *a ^= mask; local_irq_restore(flags); - return retval; } -static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr) +#endif /* CONFIG_SMP */ + +/* + * clear_bit() doesn't provide any barrier for the compiler. + */ +#define smp_mb__before_clear_bit() barrier() +#define smp_mb__after_clear_bit() barrier() + +static inline void __set_bit(int nr, volatile unsigned long *addr) +{ + int *a = (int *)addr; + int mask; + + a += nr >> 5; + mask = 1 << (nr & 0x1f); + *a |= mask; +} + +static inline void __clear_bit(int nr, volatile unsigned long *addr) +{ + int *a = (int *)addr; + int mask; + + a += nr >> 5; + mask = 1 << (nr & 0x1f); + *a &= ~mask; +} + +static inline void __change_bit(int nr, volatile unsigned long *addr) +{ + int mask; + unsigned long *ADDR = (unsigned long *)addr; + + ADDR += nr >> 5; + mask = 1 << (nr & 31); + *ADDR ^= mask; +} + +static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) { int mask, retval; volatile unsigned int *a = (volatile unsigned int *)addr; @@ -145,26 +212,23 @@ static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr) a += nr >> 5; mask = 1 << (nr & 0x1f); retval = (mask & *a) != 0; - *a &= ~mask; + *a |= mask; return retval; } -static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr) +static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) { int mask, retval; volatile unsigned int *a = (volatile unsigned int *)addr; - unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); - local_irq_save(flags); retval = (mask & *a) != 0; - *a ^= mask; - local_irq_restore(flags); + *a &= ~mask; return retval; } -static __inline__ int __test_and_change_bit(int nr, +static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) { int mask, retval; @@ -177,16 +241,7 @@ static __inline__ int __test_and_change_bit(int nr, return retval; } -/* - * This routine doesn't need to be atomic. - */ -static __inline__ int __constant_test_bit(int nr, const void *addr) -{ - return ((1UL << (nr & 31)) & - (((const volatile unsigned int *)addr)[nr >> 5])) != 0; -} - -static __inline__ int __test_bit(int nr, const void *addr) +static inline int __test_bit(int nr, const void *addr) { int *a = (int *)addr; int mask; @@ -196,10 +251,16 @@ static __inline__ int __test_bit(int nr, const void *addr) return ((mask & *a) != 0); } -#define test_bit(nr,addr) \ -(__builtin_constant_p(nr) ? \ - __constant_test_bit((nr),(addr)) : \ - __test_bit((nr),(addr))) +#ifndef CONFIG_SMP +/* + * This routine doesn't need irq save and restore ops in UP + * context. + */ +static inline int test_bit(int nr, const void *addr) +{ + return __test_bit(nr, addr); +} +#endif #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/hweight.h> |