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authorGeert Uytterhoeven <geert+renesas@glider.be>2019-12-31 17:16:42 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-02-10 15:45:58 +0300
commit4e28626dbc2cac7d27f91a3171f6fd34626280b3 (patch)
tree8f986af3bac8e281b98316a8267272d273029038 /arch/arm
parent516f68943a6ad4aadfa384e4ce3751e03e1afbda (diff)
downloadlinux-4e28626dbc2cac7d27f91a3171f6fd34626280b3.tar.xz
ARM: dts: renesas: Group tuples in operating-points properties
To improve human readability and enable automatic validation, the tuples in the "operating-points" properties of CPU nodes should be grouped. Fix this by grouping the tuples of these properties using angle brackets in the DTS files for all Renesas SoCs that don't already do so. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20191231141642.31609-1-geert+renesas@glider.be
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/r8a73a4-ape6evm.dts7
-rw-r--r--arch/arm/boot/dts/sh73a0-kzm9g.dts9
2 files changed, 5 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
index a5351ddbf506..b088e8e351d5 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
@@ -157,11 +157,8 @@
&cpu0 {
cpu0-supply = <&vdd_dvfs>;
- operating-points = <
- /* kHz uV */
- 1950000 1115000
- 1462500 995000
- >;
+ operating-points = <1950000 1115000>, /* kHz uV */
+ <1462500 995000>;
voltage-tolerance = <1>; /* 1% */
};
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
index 1916f31a30ff..5a8d92a061df 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
@@ -25,12 +25,9 @@
cpus {
cpu@0 {
cpu0-supply = <&vdd_dvfs>;
- operating-points = <
- /* kHz uV */
- 1196000 1315000
- 598000 1175000
- 398667 1065000
- >;
+ operating-points = <1196000 1315000>, /* kHz uV */
+ < 598000 1175000>,
+ < 398667 1065000>;
voltage-tolerance = <1>; /* 1% */
};
};