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author | saeed bishara <saeed@marvell.com> | 2011-05-16 14:25:21 +0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-21 01:39:17 +0400 |
commit | 31bee4cf0e74e9c962d481a68452debaf45ed4ac (patch) | |
tree | 1f335572d363ba66739037a9e6ac2b4e376781d8 /arch/arm | |
parent | 5f23188e036aabfe9245f9e61adbb4ea27ed8f35 (diff) | |
download | linux-31bee4cf0e74e9c962d481a68452debaf45ed4ac.tar.xz |
ARM: 6899/1: fix the note about dcache lazy flushing for SMP systems
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mm/flush.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 2b269c955524..b7f69800348f 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -275,7 +275,8 @@ void __sync_icache_dcache(pte_t pteval) * kernel cache lines for later. Otherwise, we assume we have * aliasing mappings. * - * Note that we disable the lazy flush for SMP. + * Note that we disable the lazy flush for SMP configurations where + * the cache maintenance operations are not automatically broadcasted. */ void flush_dcache_page(struct page *page) { |