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authorDave Martin <Dave.Martin@arm.com>2017-10-31 18:51:00 +0300
committerWill Deacon <will.deacon@arm.com>2017-11-03 18:24:13 +0300
commit672365649ccac68cf6fafecad1a7913951e7493b (patch)
treeee5c278cd742440cf4f08c742e2964f07d4c6a31 /arch/arm64/include/asm/kvm_arm.h
parent9cf5b54fafedbc381df77c7f8d2aab61f4900657 (diff)
downloadlinux-672365649ccac68cf6fafecad1a7913951e7493b.tar.xz
arm64/sve: System register and exception syndrome definitions
The SVE architecture adds some system registers, ID register fields and a dedicated ESR exception class. This patch adds the appropriate definitions that will be needed by the kernel. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/kvm_arm.h')
-rw-r--r--arch/arm64/include/asm/kvm_arm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 61d694c2eae5..dbf05370169a 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -185,6 +185,7 @@
#define CPTR_EL2_TCPAC (1 << 31)
#define CPTR_EL2_TTA (1 << 20)
#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)
+#define CPTR_EL2_TZ (1 << 8)
#define CPTR_EL2_DEFAULT 0x000033ff
/* Hyp Debug Configuration Register bits */