diff options
| author | Punit Agrawal <punit.agrawal@arm.com> | 2014-11-18 14:41:26 +0300 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2014-11-20 19:34:48 +0300 |
| commit | c852f320584600a372646055d8229e063949eee7 (patch) | |
| tree | 57f88ee08e59727db2ac8d305ad89f15990b4ecd /arch/arm64/include/asm/insn.h | |
| parent | bd35a4adc4131c530ec7d90242555eac7b3dbe3f (diff) | |
| download | linux-c852f320584600a372646055d8229e063949eee7.tar.xz | |
arm64: Emulate CP15 Barrier instructions
The CP15 barrier instructions (CP15ISB, CP15DSB and CP15DMB) are
deprecated in the ARMv7 architecture, superseded by ISB, DSB and DMB
instructions respectively. Some implementations may provide the
ability to disable the CP15 barriers by disabling the CP15BEN bit in
SCTLR_EL1. If not enabled, the encodings for these instructions become
undefined.
To support legacy software using these instructions, this patch
register hooks to -
* emulate CP15 barriers and warn the user about their use
* toggle CP15BEN in SCTLR_EL1
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/insn.h')
| -rw-r--r-- | arch/arm64/include/asm/insn.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h index 3ecc57c47c04..e2ff32a93b5c 100644 --- a/arch/arm64/include/asm/insn.h +++ b/arch/arm64/include/asm/insn.h @@ -362,6 +362,8 @@ bool aarch32_insn_is_wide(u32 insn); #define A32_RT2_OFFSET 0 u32 aarch32_insn_extract_reg_num(u32 insn, int offset); +u32 aarch32_insn_mcr_extract_opc2(u32 insn); +u32 aarch32_insn_mcr_extract_crm(u32 insn); #endif /* __ASSEMBLY__ */ #endif /* __ASM_INSN_H */ |