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authorMauro Carvalho Chehab <mchehab@s-opensource.com>2018-01-03 12:14:04 +0300
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2018-01-03 12:14:04 +0300
commit3bdf481e39ff1d36c1f2e1b3862db2ac329b12cd (patch)
tree91ad50553511f1cb4583edce10c16371f69fa7aa /arch/arm64/include/asm/assembler.h
parentd0c8f6ad8b381dd572576ac50b9696d4d31142bb (diff)
parent30a7acd573899fd8b8ac39236eff6468b195ac7d (diff)
downloadlinux-3bdf481e39ff1d36c1f2e1b3862db2ac329b12cd.tar.xz
Merge tag 'v4.15-rc6' into patchwork
Linux 4.15-rc6 * tag 'v4.15-rc6': (734 commits) Linux 4.15-rc6 MAINTAINERS: mark arch/blackfin/ and its gubbins as orphaned x86/ldt: Make LDT pgtable free conditional x86/ldt: Plug memory leak in error path x86/mm: Remove preempt_disable/enable() from __native_flush_tlb() x86/smpboot: Remove stale TLB flush invocations objtool: Fix seg fault with clang-compiled objects objtool: Fix seg fault caused by missing parameter kbuild: add '-fno-stack-check' to kernel build options timerqueue: Document return values of timerqueue_add/del() timers: Invoke timer_start_debug() where it makes sense nohz: Prevent a timer interrupt storm in tick_nohz_stop_sched_tick() timers: Reinitialize per cpu bases on hotplug timers: Use deferrable base independent of base::nohz_active genirq/msi, x86/vector: Prevent reservation mode for non maskable MSI genirq/irqdomain: Rename early argument of irq_domain_activate_irq() x86/vector: Use IRQD_CAN_RESERVE flag genirq: Introduce IRQD_CAN_RESERVE flag genirq/msi: Handle reactivation only on success gpio: brcmstb: Make really use of the new lockdep class ...
Diffstat (limited to 'arch/arm64/include/asm/assembler.h')
-rw-r--r--arch/arm64/include/asm/assembler.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index aef72d886677..8b168280976f 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -512,4 +512,14 @@ alternative_else_nop_endif
#endif
.endm
+/**
+ * Errata workaround prior to disable MMU. Insert an ISB immediately prior
+ * to executing the MSR that will change SCTLR_ELn[M] from a value of 1 to 0.
+ */
+ .macro pre_disable_mmu_workaround
+#ifdef CONFIG_QCOM_FALKOR_ERRATUM_E1041
+ isb
+#endif
+ .endm
+
#endif /* __ASM_ASSEMBLER_H */