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| author | Rohit Agarwal <rohiagar@chromium.org> | 2024-08-30 11:45:43 +0300 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2024-09-09 17:41:36 +0300 |
| commit | 7a3852a9ba2e40738fa4ddadb4e94ae68f3826a4 (patch) | |
| tree | 6a3659e88181459eabe5907bb64e8d0298bfa868 /arch/arm64/boot/dts | |
| parent | 51bc68debab9e30b50c6352315950f3cfc309b32 (diff) | |
| download | linux-7a3852a9ba2e40738fa4ddadb4e94ae68f3826a4.tar.xz | |
arm64: dts: mediatek: mt8186: Add power domain for DPI
Add power domain phandle to the DPI controller in mediatek
mt8186 SoC.
Signed-off-by: Rohit Agarwal <rohiagar@chromium.org>
Link: https://lore.kernel.org/r/20240830084544.2898512-3-rohiagar@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8186.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index ddfe7880c745..380071822334 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1845,6 +1845,7 @@ assigned-clocks = <&topckgen CLK_TOP_DPI>; assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>; interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>; + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; status = "disabled"; port { |