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authorValentin Caron <valentin.caron@foss.st.com>2024-05-20 17:00:22 +0300
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2024-06-05 10:33:42 +0300
commitc3aa0dccf0ccbdd2c2ad556382bbae95344e4992 (patch)
tree9e709b6d612837cf09132749c5fad0dfd319b780 /arch/arm64/boot/dts/st/stm32mp251.dtsi
parent6e043ff6350267bb39de01499a8ad0035c729393 (diff)
downloadlinux-c3aa0dccf0ccbdd2c2ad556382bbae95344e4992.tar.xz
arm64: dts: st: add usart nodes on stm32mp25
Update device-tree stm32mp251.dtsi to add some USART features. Add u(s)art 1, 3, 4, 5, 6, 7, 8, 9 nodes and compatible, interrupts, clocks, access-controllers properties. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm64/boot/dts/st/stm32mp251.dtsi')
-rw-r--r--arch/arm64/boot/dts/st/stm32mp251.dtsi72
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 7454e615350c..2013f391f4b9 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -150,6 +150,33 @@
status = "disabled";
};
+ usart3: serial@400f0000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x400f0000 0x400>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_USART3>;
+ access-controllers = <&rifsc 33>;
+ status = "disabled";
+ };
+
+ uart4: serial@40100000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x40100000 0x400>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_UART4>;
+ access-controllers = <&rifsc 34>;
+ status = "disabled";
+ };
+
+ uart5: serial@40110000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x40110000 0x400>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_UART5>;
+ access-controllers = <&rifsc 35>;
+ status = "disabled";
+ };
+
i2c1: i2c@40120000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40120000 0x400>;
@@ -241,6 +268,15 @@
status = "disabled";
};
+ usart6: serial@40220000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x40220000 0x400>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_USART6>;
+ access-controllers = <&rifsc 36>;
+ status = "disabled";
+ };
+
spi1: spi@40230000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -277,6 +313,24 @@
status = "disabled";
};
+ uart9: serial@402c0000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x402c0000 0x400>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_UART9>;
+ access-controllers = <&rifsc 39>;
+ status = "disabled";
+ };
+
+ usart1: serial@40330000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x40330000 0x400>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_USART1>;
+ access-controllers = <&rifsc 31>;
+ status = "disabled";
+ };
+
spi6: spi@40350000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -301,6 +355,24 @@
status = "disabled";
};
+ uart7: serial@40370000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x40370000 0x400>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_UART7>;
+ access-controllers = <&rifsc 37>;
+ status = "disabled";
+ };
+
+ uart8: serial@40380000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x40380000 0x400>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_KER_UART8>;
+ access-controllers = <&rifsc 38>;
+ status = "disabled";
+ };
+
spi8: spi@46020000 {
#address-cells = <1>;
#size-cells = <0>;