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author | Jacopo Mondi <jacopo+renesas@jmondi.org> | 2018-02-27 13:22:46 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2018-03-13 21:16:09 +0300 |
commit | b3635b18bba8fc6bd57b7747d97fc46afcf551b8 (patch) | |
tree | 79f7399699773947acfbc409bf9306224dba8625 /arch/arm64/boot/dts/renesas/ulcb.dtsi | |
parent | 3438ff82ddbaa430ccfcc11fe877691a7e326ae0 (diff) | |
download | linux-b3635b18bba8fc6bd57b7747d97fc46afcf551b8.tar.xz |
arm64: dts: renesas: ulcb: Override EtherAVB phy-mode
As the PHY interface installed on the ULCB board provides TX
channel delay, make the "phy-mode" property a board-specific one, meant
to override the one specified in the SoC DTSI.
Follow up patches will reset the r8a7795/96 SoC DTSI to use "rgmii" mode\
and let the board files override that.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/ulcb.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/renesas/ulcb.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi index 3e7a6b94e9f8..6f814845f8b6 100644 --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi @@ -146,6 +146,7 @@ pinctrl-0 = <&avb_pins>; pinctrl-names = "default"; phy-handle = <&phy0>; + phy-mode = "rgmii-txid"; status = "okay"; phy0: ethernet-phy@0 { |