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authorCong Dang <cong.dang.xn@renesas.com>2024-02-01 17:15:56 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2024-02-22 13:03:32 +0300
commit93e28f88710b2cbe51d6fe760cdf53fc9621f33c (patch)
tree75b677af339ff89bc960be52c8b11fbe5ee7385d /arch/arm64/boot/dts/renesas/r8a779h0.dtsi
parent74a9d17af7db7fea0c041c536d2dc80ddc7e95ee (diff)
downloadlinux-93e28f88710b2cbe51d6fe760cdf53fc9621f33c.tar.xz
arm64: dts: renesas: r8a779h0: Add GPIO nodes
Add device nodes for the General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/d4c1c40404ab84c7e7c07612077ca1a319ae7283.1706796918.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a779h0.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a779h0.dtsi120
1 files changed, 120 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
index 8121aadaf699..eb555cbf51a4 100644
--- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
@@ -78,6 +78,126 @@
<0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>;
};
+ gpio0: gpio@e6050180 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6050180 0 0x54>;
+ interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 19>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 915>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ };
+
+ gpio1: gpio@e6050980 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6050980 0 0x54>;
+ interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 30>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 915>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ };
+
+ gpio2: gpio@e6058180 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6058180 0 0x54>;
+ interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 20>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 916>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ };
+
+ gpio3: gpio@e6058980 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6058980 0 0x54>;
+ interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 916>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ };
+
+ gpio4: gpio@e6060180 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6060180 0 0x54>;
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 25>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 917>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ };
+
+ gpio5: gpio@e6060980 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6060980 0 0x54>;
+ interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 917>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ };
+
+ gpio6: gpio@e6061180 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6061180 0 0x54>;
+ interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 917>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ };
+
+ gpio7: gpio@e6061980 {
+ compatible = "renesas,gpio-r8a779h0",
+ "renesas,rcar-gen4-gpio";
+ reg = <0 0xe6061980 0 0x54>;
+ interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 917>;
+ power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a779h0-cpg-mssr";
reg = <0 0xe6150000 0 0x4000>;