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author | Olof Johansson <olof@lixom.net> | 2017-09-06 06:41:43 +0300 |
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committer | Olof Johansson <olof@lixom.net> | 2017-09-06 06:41:43 +0300 |
commit | b884026a2b80529fc7a4de729b92ee0ba555bfed (patch) | |
tree | 2209b3faf920ff1f7cc5e78645aea5e04bac2c14 /arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | |
parent | e3e36ab37c9eac0f2a821806fea05c64f367304b (diff) | |
parent | c911171a7488c0028cfa05f2cf52f0067c7c880b (diff) | |
download | linux-b884026a2b80529fc7a4de729b92ee0ba555bfed.tar.xz |
Merge branch 'next/dt64' into next/dt
* next/dt64: (233 commits)
arm64: dts: marvell: mcbin: enable more networking ports
arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
arm64: dts: marvell: add TX interrupts for PPv2.2
arm64: dts: uniphier: add PXs3 SoC support
arm64: dts: uniphier: fix size of sdctrl node
arm64: dts: uniphier: add AIDET nodes
arm64: dts: uniphier: add reset controller node of analog amplifier
arm64: dts: marvell: add Device Tree files for Armada-8KP
arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM
arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM
dt-bindings: add rk3399-q7 SoM
arm64: dts: rockchip: add rk3328-rock64 board
arm64: dts: rockchip: add rk3328 pdm node
ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names
ARM64: dts: meson-gx: Add AO CEC nodes
ARM64: dts: meson-gx: update AO clkc to new bindings
arm64: dts: rockchip: add more rk3399 iommu nodes
arm64: dts: rockchip: add rk3368 iommu nodes
arm64: dts: rockchip: add rk3328 iommu nodes
arm64: zynqmp: Add generic compatible string for I2C EEPROM
...
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 68aadc9b96dc..8c8db1b057df 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -467,6 +467,15 @@ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; }; + r_intc: interrupt-controller@1f00c00 { + compatible = "allwinner,sun50i-a64-r-intc", + "allwinner,sun6i-a31-r-intc"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x01f00c00 0x400>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; + r_ccu: clock@1f01400 { compatible = "allwinner,sun50i-a64-r-ccu"; reg = <0x01f01400 0x100>; |