diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-26 17:35:07 +0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 13:56:11 +0400 |
commit | 3e287bec6fde088bff05ee7f998f53e8ac75b922 (patch) | |
tree | 4ad814de273327ae1e6ddc354ab0ab6bb9653246 /arch/arm/mm/abort-ev5t.S | |
parent | 8dfe7ac96fedd4f5219879f63a8a546a33609daf (diff) | |
download | linux-3e287bec6fde088bff05ee7f998f53e8ac75b922.tar.xz |
ARM: entry: data abort: arrange for CPU abort helpers to take pc/psr in r4/r5
Re-jig the CPU abort helpers to take the PC/PSR in r4/r5 rather
than r2/r3.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/abort-ev5t.S')
-rw-r--r-- | arch/arm/mm/abort-ev5t.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mm/abort-ev5t.S b/arch/arm/mm/abort-ev5t.S index 800e8d42d39e..97eee7c48019 100644 --- a/arch/arm/mm/abort-ev5t.S +++ b/arch/arm/mm/abort-ev5t.S @@ -4,8 +4,8 @@ /* * Function: v5t_early_abort * - * Params : r2 = address of aborted instruction - * : r3 = saved SPSR + * Params : r4 = aborted context pc + * : r5 = aborted context psr * * Returns : r0 = address of abort * : r1 = FSR, bit 11 = write @@ -22,8 +22,8 @@ ENTRY(v5t_early_abort) mrc p15, 0, r1, c5, c0, 0 @ get FSR mrc p15, 0, r0, c6, c0, 0 @ get FAR - do_thumb_abort fsr=r1, pc=r2, psr=r3, tmp=r3 - ldreq r3, [r2] @ read aborted ARM instruction + do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3 + ldreq r3, [r4] @ read aborted ARM instruction bic r1, r1, #1 << 11 @ clear bits 11 of FSR do_ldrd_abort tmp=r2, insn=r3 tst r3, #1 << 20 @ check write |