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| author | Laxman Dewangan <ldewangan@nvidia.com> | 2012-06-20 16:36:34 +0400 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-07-06 21:48:56 +0400 |
| commit | b861c275ea5cfeab32241c3c92a203579d5699ff (patch) | |
| tree | 42f5a062a8c5856681d56aa8eda0d0fbb13220ac /arch/arm/mach-tegra/common.c | |
| parent | 702b0e4f2f2782962aab7d9a0a40ad68770bb1f6 (diff) | |
| download | linux-b861c275ea5cfeab32241c3c92a203579d5699ff.tar.xz | |
ARM: tegra: apbio access using dma for tegra20 only
The Tegra20 HW issue with accessing APBIO registers (such
as fuse registers) directly from the CPU concurrently with
APB DMA accesses has been fixed in Tegra30 and later chips.
Access these registers directly from the CPU on Tegra30
and later, and apply the workaround only for Tegra20.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/common.c')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 204a5c8b0b57..96fef6bcc651 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -33,6 +33,7 @@ #include "clock.h" #include "fuse.h" #include "pmc.h" +#include "apbio.h" /* * Storage for debug-macro.S's state. @@ -127,6 +128,7 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency) #ifdef CONFIG_ARCH_TEGRA_2x_SOC void __init tegra20_init_early(void) { + tegra_apb_io_init(); tegra_init_fuse(); tegra2_init_clocks(); tegra_clk_init_from_table(tegra20_clk_init_table); @@ -138,6 +140,7 @@ void __init tegra20_init_early(void) #ifdef CONFIG_ARCH_TEGRA_3x_SOC void __init tegra30_init_early(void) { + tegra_apb_io_init(); tegra_init_fuse(); tegra30_init_clocks(); tegra_clk_init_from_table(tegra30_clk_init_table); |