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| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-01-23 16:30:34 +0300 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2011-03-10 23:23:12 +0300 |
| commit | 4444d712fd5b31f2348b57eaa2bbdc5e68c4e1b6 (patch) | |
| tree | 049e428aaddc72e916c8850b19474006dd360a51 /arch/arm/mach-omap2/sleep34xx.S | |
| parent | b1ace38094c4926255343a81faba8fb4faf59a45 (diff) | |
| download | linux-4444d712fd5b31f2348b57eaa2bbdc5e68c4e1b6.tar.xz | |
OMAP3: PM: Use ARMv7 supported instructions instead of legacy CP15 ones
On ARMv7 dsb, dmb instructions are supported and can be used directly
instead of their cp15 equivalnet. Also remove the opcodes for smc
and use the available instruction directly in OMAP3 low power asm code
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/sleep34xx.S')
| -rw-r--r-- | arch/arm/mach-omap2/sleep34xx.S | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 0c1b33511fed..1c17ee81cb12 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -144,8 +144,8 @@ ENTRY(save_secure_ram_context) mov r1, #0 @ set task id for ROM code in r1 mov r2, #4 @ set some flags in r2, r6 mov r6, #0xff - mcr p15, 0, r0, c7, c10, 4 @ data write barrier - mcr p15, 0, r0, c7, c10, 5 @ data memory barrier + dsb @ data write barrier + dmb @ data memory barrier smc #1 @ call SMI monitor (smi #1) nop nop @@ -314,9 +314,8 @@ omap3_do_wfi: str r5, [r4] @ write back to SDRC_POWER register /* Data memory barrier and Data sync barrier */ - mov r1, #0 - mcr p15, 0, r1, c7, c10, 4 - mcr p15, 0, r1, c7, c10, 5 + dsb + dmb /* * =================================== @@ -431,8 +430,8 @@ skipl2dis: mov r2, #4 @ set some flags in r2, r6 mov r6, #0xff adr r3, l2_inv_api_params @ r3 points to dummy parameters - mcr p15, 0, r0, c7, c10, 4 @ data write barrier - mcr p15, 0, r0, c7, c10, 5 @ data memory barrier + dsb @ data write barrier + dmb @ data memory barrier smc #1 @ call SMI monitor (smi #1) /* Write to Aux control register to set some bits */ mov r0, #42 @ set service ID for PPA @@ -442,8 +441,8 @@ skipl2dis: mov r6, #0xff ldr r4, scratchpad_base ldr r3, [r4, #0xBC] @ r3 points to parameters - mcr p15, 0, r0, c7, c10, 4 @ data write barrier - mcr p15, 0, r0, c7, c10, 5 @ data memory barrier + dsb @ data write barrier + dmb @ data memory barrier smc #1 @ call SMI monitor (smi #1) #ifdef CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE @@ -457,8 +456,8 @@ skipl2dis: ldr r4, scratchpad_base ldr r3, [r4, #0xBC] adds r3, r3, #8 @ r3 points to parameters - mcr p15, 0, r0, c7, c10, 4 @ data write barrier - mcr p15, 0, r0, c7, c10, 5 @ data memory barrier + dsb @ data write barrier + dmb @ data memory barrier smc #1 @ call SMI monitor (smi #1) #endif b logic_l1_restore |