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authorMarek Vasut <marex@denx.de>2020-08-22 23:34:25 +0300
committerAlexandre Torgue <alexandre.torgue@st.com>2020-09-23 19:37:02 +0300
commit3c5c0eee95ece9a73969a94832093be8892cd4c1 (patch)
treeb7d5a937f02c0117884160f0d8cac1763693a5cf /arch/arm/boot
parent9ad98319e95263469d8ca2cb543c37c5a2f40980 (diff)
downloadlinux-3c5c0eee95ece9a73969a94832093be8892cd4c1.tar.xz
ARM: dts: stm32: Enable RTS/CTS for DH AV96 UART7
The DH AV96 has RTS/CTS lines available on UART7, describe them in DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
index 905cd7bb98cf..ec02cee1dd9b 100644
--- a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
+++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
@@ -351,6 +351,7 @@
label = "LS-UART0";
pinctrl-names = "default";
pinctrl-0 = <&uart7_pins_a>;
+ uart-has-rtscts;
status = "okay";
};