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| author | Stephen Warren <swarren@nvidia.com> | 2013-11-07 23:20:57 +0400 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-12-17 01:09:17 +0400 |
| commit | f71e4f034a57b0203d91aa7c805a12c75f476dab (patch) | |
| tree | 485c079855597c0895606103a7fc249b1a4629a9 /arch/arm/boot/dts/tegra124.dtsi | |
| parent | 3b86baf296eb2791eeeacd2ed07f7d2789784d24 (diff) | |
| download | linux-f71e4f034a57b0203d91aa7c805a12c75f476dab.tar.xz | |
ARM: tegra: add reset properties to Tegra124 DTs
The DT bindings now require module resets to be specified. The earlier
patches which added these nodes were originally written before that
requirement.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 936579b806d4..4ed6a3a8e2de 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -36,6 +36,7 @@ compatible = "nvidia,tegra124-car"; reg = <0x60006000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; gpio: gpio@6000d000 { @@ -69,6 +70,8 @@ reg-shift = <2>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTA>; + resets = <&tegra_car 6>; + reset-names = "serial"; status = "disabled"; }; @@ -78,6 +81,8 @@ reg-shift = <2>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTB>; + resets = <&tegra_car 7>; + reset-names = "serial"; status = "disabled"; }; @@ -87,6 +92,8 @@ reg-shift = <2>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTC>; + resets = <&tegra_car 55>; + reset-names = "serial"; status = "disabled"; }; @@ -96,6 +103,8 @@ reg-shift = <2>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTD>; + resets = <&tegra_car 65>; + reset-names = "serial"; status = "disabled"; }; @@ -105,6 +114,8 @@ reg-shift = <2>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTE>; + resets = <&tegra_car 66>; + reset-names = "serial"; status = "disabled"; }; |