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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-02-10 04:38:04 +0300
committerThierry Reding <treding@nvidia.com>2018-03-08 18:15:34 +0300
commit818e8729e1038e3847a4cb2ed7ad8003a1d037ab (patch)
tree66c90eddeda02f53a1c10c9f5d1a5db8b4380103 /arch/arm/boot/dts/tegra124-apalis.dtsi
parent405698f07271ee116892579c30494efa53dee333 (diff)
downloadlinux-818e8729e1038e3847a4cb2ed7ad8003a1d037ab.tar.xz
ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOs
The Apalis TK1 module uses some dedicated GPIOs as I210 gigabit Ethernet controller reset and to control RESET_MOCI aka reset module output carrier input on MXM3 pin 26. The Apalis Evaluation Board furthermore uses Apalis GPIO7 on MXM3 pin 15 as reset signal for its PLX PEX 8605 PCIe Switch. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-apalis.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra124-apalis.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 44c31176ce90..b7648ce4565d 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -2070,3 +2070,21 @@
};
};
};
+
+&gpio {
+ /* I210 Gigabit Ethernet Controller Reset */
+ lan_reset_n {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LAN_RESET_N";
+ };
+
+ /* Control MXM3 pin 26 Reset Module Output Carrier Input */
+ reset_moci_ctrl {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "RESET_MOCI_CTRL";
+ };
+};