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| author | Marc Zyngier <marc.zyngier@arm.com> | 2017-01-18 12:27:28 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2017-02-07 17:06:46 +0300 |
| commit | 387720c93812f1e702c20c667cb003a356e24a6c (patch) | |
| tree | 36b3c401f3057808d05b166c423b46137635b7f6 /arch/arm/boot/dts/r8a7792.dtsi | |
| parent | 1defa60e5dc43eccc6cd50deb8f39b5ee5c52463 (diff) | |
| download | linux-387720c93812f1e702c20c667cb003a356e24a6c.tar.xz | |
ARM: DTS: Fix register map for virt-capable GIC
Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.
Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).
In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/r8a7792.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7792.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 135e06920e2d..8ecfda7a004e 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -88,7 +88,7 @@ #interrupt-cells = <3>; interrupt-controller; reg = <0 0xf1001000 0 0x1000>, - <0 0xf1002000 0 0x1000>, + <0 0xf1002000 0 0x2000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | |