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authorTony Lindgren <tony@atomide.com>2022-04-29 09:57:36 +0300
committerTony Lindgren <tony@atomide.com>2022-05-03 09:15:42 +0300
commiteea4b03528410bc893b031860885e25e4f856bf3 (patch)
tree30fb88f938d4f30c24d72fa9490ff492df8a4840 /arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
parentaeb4dcf2c2bf0f8b0ae354ea37cf55fd0e17de65 (diff)
downloadlinux-eea4b03528410bc893b031860885e25e4f856bf3.tar.xz
ARM: dts: Group omap3 CM_ICLKEN1_CORE clocks
The clksel related registers on omap3 cause unique_unit_address and node_name_chars_strict warnings with the W=1 or W=2 make flags enabled. With the clock drivers updated, we can now avoid most of these warnings by grouping the TI component clocks using the TI clksel binding, and with the use of clock-output-names property to avoid non-standard node names for the clocks. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi')
-rw-r--r--arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi35
1 files changed, 21 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
index 247236326da5..c74566ff1f22 100644
--- a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
@@ -43,12 +43,27 @@
clock-div = <2>;
};
- hsotgusb_ick_3430es2: hsotgusb_ick_3430es2@a10 {
- #clock-cells = <0>;
- compatible = "ti,omap3-hsotgusb-interface-clock";
- clocks = <&core_l3_ick>;
- reg = <0x0a10>;
- ti,bit-shift = <4>;
+ clock@a10 {
+ compatible = "ti,clksel";
+ reg = <0xa10>;
+ #clock-cells = <2>;
+ #address-cells = <0>;
+
+ hsotgusb_ick_3430es2: clock-hsotgusb-ick-3430es2 {
+ #clock-cells = <0>;
+ compatible = "ti,omap3-hsotgusb-interface-clock";
+ clock-output-names = "hsotgusb_ick_3430es2";
+ clocks = <&core_l3_ick>;
+ ti,bit-shift = <4>;
+ };
+
+ ssi_ick: clock-ssi-ick-3430es2 {
+ #clock-cells = <0>;
+ compatible = "ti,omap3-ssi-interface-clock";
+ clock-output-names = "ssi_ick_3430es2";
+ clocks = <&ssi_l4_ick>;
+ ti,bit-shift = <0>;
+ };
};
ssi_l4_ick: ssi_l4_ick {
@@ -59,14 +74,6 @@
clock-div = <1>;
};
- ssi_ick: ssi_ick_3430es2@a10 {
- #clock-cells = <0>;
- compatible = "ti,omap3-ssi-interface-clock";
- clocks = <&ssi_l4_ick>;
- reg = <0x0a10>;
- ti,bit-shift = <0>;
- };
-
usim_gate_fck: usim_gate_fck@c00 {
#clock-cells = <0>;
compatible = "ti,composite-gate-clock";