diff options
| author | Jon Hunter <jon-hunter@ti.com> | 2012-10-19 18:59:00 +0400 |
|---|---|---|
| committer | Benoit Cousson <b-cousson@ti.com> | 2012-10-29 19:56:32 +0400 |
| commit | fab8ad0b2b5f2b6d25c6020a61bf3339e53fec61 (patch) | |
| tree | 8a0ddc775d0feae45f97b8d79a3cdd2b239ad9aa /arch/arm/boot/dts/omap2.dtsi | |
| parent | 4c94ac29b5c1f0cef2281df97609f2cbcc09cf9c (diff) | |
| download | linux-fab8ad0b2b5f2b6d25c6020a61bf3339e53fec61.tar.xz | |
ARM: dts: OMAP: Add timer nodes
Add the 12 GP timers nodes present in OMAP2.
Add the 12 GP timers nodes present in OMAP3.
Add the 11 GP timers nodes present in OMAP4.
Add the 7 GP timers nodes present in AM33xx.
Add documentation for timer properties specific to OMAP.
Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified
Vaibhav's original nodes adding information on which timers support a PWM
output.
V5 changes:
- Updated timer register sizes for OMAP2/3/4.
- Modified AM335x timer register size to be 1KB instead of 4KB to align with
HWMOD.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/omap2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap2.dtsi | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index f366482216c0..761c4b69b25b 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -66,5 +66,90 @@ ti,hwmods = "uart3"; clock-frequency = <48000000>; }; + + timer2: timer@4802a000 { + compatible = "ti,omap2-timer"; + reg = <0x4802a000 0x400>; + interrupts = <38>; + ti,hwmods = "timer2"; + }; + + timer3: timer@48078000 { + compatible = "ti,omap2-timer"; + reg = <0x48078000 0x400>; + interrupts = <39>; + ti,hwmods = "timer3"; + }; + + timer4: timer@4807a000 { + compatible = "ti,omap2-timer"; + reg = <0x4807a000 0x400>; + interrupts = <40>; + ti,hwmods = "timer4"; + }; + + timer5: timer@4807c000 { + compatible = "ti,omap2-timer"; + reg = <0x4807c000 0x400>; + interrupts = <41>; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer@4807e000 { + compatible = "ti,omap2-timer"; + reg = <0x4807e000 0x400>; + interrupts = <42>; + ti,hwmods = "timer6"; + ti,timer-dsp; + }; + + timer7: timer@48080000 { + compatible = "ti,omap2-timer"; + reg = <0x48080000 0x400>; + interrupts = <43>; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer@48082000 { + compatible = "ti,omap2-timer"; + reg = <0x48082000 0x400>; + interrupts = <44>; + ti,hwmods = "timer8"; + ti,timer-dsp; + }; + + timer9: timer@48084000 { + compatible = "ti,omap2-timer"; + reg = <0x48084000 0x400>; + interrupts = <45>; + ti,hwmods = "timer9"; + ti,timer-pwm; + }; + + timer10: timer@48086000 { + compatible = "ti,omap2-timer"; + reg = <0x48086000 0x400>; + interrupts = <46>; + ti,hwmods = "timer10"; + ti,timer-pwm; + }; + + timer11: timer@48088000 { + compatible = "ti,omap2-timer"; + reg = <0x48088000 0x400>; + interrupts = <47>; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; + + timer12: timer@4808a000 { + compatible = "ti,omap2-timer"; + reg = <0x4808a000 0x400>; + interrupts = <48>; + ti,hwmods = "timer12"; + ti,timer-pwm; + }; }; }; |