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author | Trent Piepho <tpiepho@impinj.com> | 2019-02-05 03:17:40 +0300 |
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committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-02-12 22:17:34 +0300 |
commit | 27f7717e2344a087e396796ed6b10d15722c9e43 (patch) | |
tree | cb7797c59c739c180d1dc574da4a43e8388c8ca5 /arch/arm/boot/dts/imx7d.dtsi | |
parent | b7e312dea1d8378b8f311ce9096759b5accb1939 (diff) | |
download | linux-27f7717e2344a087e396796ed6b10d15722c9e43.tar.xz |
ARM: dts: imx7d: Add node for PCIe PHY
This adds the PHY as a new node. The PCI-e controller node gains a
phandle property that points to it.
There isn't yet any code in the kernel that uses this device's
registers, but it will be added for a PCIe PLL erratum workaround.
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7d.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx7d.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 6b298e388f4b..6eb98e7c568d 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -96,6 +96,14 @@ }; }; +&aips2 { + pcie_phy: pcie-phy@306d0000 { + compatible = "fsl,imx7d-pcie-phy"; + reg = <0x306d0000 0x10000>; + status = "disabled"; + }; +}; + &aips3 { usbotg2: usb@30b20000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; @@ -173,6 +181,7 @@ <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; reset-names = "pciephy", "apps", "turnoff"; + fsl,imx7d-pcie-phy = <&pcie_phy>; status = "disabled"; }; }; |