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| author | Anson Huang <Anson.Huang@nxp.com> | 2018-08-31 10:53:18 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-11-05 05:19:09 +0300 |
| commit | 39db0e136b23b3c2318714013e97f6093e38229d (patch) | |
| tree | 1d856c231aeb44f3f3ac6611c79f344e560b4492 /arch/arm/boot/dts/imx6sll.dtsi | |
| parent | 46f3b54de80958f0246ffcb37a19fd3bf6c8cd04 (diff) | |
| download | linux-39db0e136b23b3c2318714013e97f6093e38229d.tar.xz | |
ARM: dts: imx6: add mmdc ipg clock
i.MX6 SoCs has MMDC clock gates in CCM CCGR, add
clock property for MMDC driver's clock operation.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sll.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sll.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index ed9a980bce85..e462f76a1c01 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -770,6 +770,7 @@ mmdc: memory-controller@21b0000 { compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6SLL_CLK_MMDC_P0_IPG>; }; ocotp: ocotp-ctrl@21bc000 { |