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authorOleksij Rempel <o.rempel@pengutronix.de>2023-01-31 11:46:28 +0300
committerShawn Guo <shawnguo@kernel.org>2023-03-06 05:01:45 +0300
commitd289654fd62b5fc21b81e23ead100e4d47ee2db7 (patch)
tree89241a4be23bc929992e87f05dc20839d61158de /arch/arm/boot/dts/imx6dl-lanmcu.dts
parent006ab3142f313129e505375f68a0e5fda1c5a5d4 (diff)
downloadlinux-d289654fd62b5fc21b81e23ead100e4d47ee2db7.tar.xz
ARM: dts: imx6dl-lanmcu: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet reference clock as input. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl-lanmcu.dts')
-rw-r--r--arch/arm/boot/dts/imx6dl-lanmcu.dts12
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6dl-lanmcu.dts b/arch/arm/boot/dts/imx6dl-lanmcu.dts
index 6b6e6fcdea9c..fa823988312d 100644
--- a/arch/arm/boot/dts/imx6dl-lanmcu.dts
+++ b/arch/arm/boot/dts/imx6dl-lanmcu.dts
@@ -21,6 +21,7 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
+ clock-output-names = "enet_ref_pad";
};
backlight: backlight {
@@ -109,14 +110,17 @@
status = "okay";
};
+&clks {
+ clocks = <&clock_ksz8081>;
+ clock-names = "enet_ref_pad";
+ assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
+ assigned-clock-parents = <&clock_ksz8081>;
+};
+
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
- clocks = <&clks IMX6QDL_CLK_ENET>,
- <&clks IMX6QDL_CLK_ENET>,
- <&clock_ksz8081>;
- clock-names = "ipg", "ahb", "ptp";
phy-handle = <&rgmii_phy>;
status = "okay";