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| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2012-11-17 18:22:27 +0400 |
|---|---|---|
| committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-20 17:46:50 +0400 |
| commit | 5b03df9ace680d7cdd34a69dfd85ca5f74159d18 (patch) | |
| tree | 76b36620fe07ceaa61a471e626f6cdfdf3cec93d /arch/arm/boot/dts/dove.dtsi | |
| parent | 307c2bf467e3682c6df1b8186365224fd2d581d3 (diff) | |
| download | linux-5b03df9ace680d7cdd34a69dfd85ca5f74159d18.tar.xz | |
ARM: dove: switch to DT clock providers
With true DT clock providers available switch Dove clock setup in DT-
enabled boards. While AUXDATA can be removed completely from bus probing,
some devices still don't know about DT at all. Therefore, some clock
aliases are created until the devices also move to DT.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/dove.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/dove.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 5a00022383e7..b524ee377f83 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -31,6 +31,19 @@ reg = <0x20204 0x04>, <0x20214 0x04>; }; + core_clk: core-clocks@d0214 { + compatible = "marvell,dove-core-clock"; + reg = <0xd0214 0x4>; + #clock-cells = <1>; + }; + + gate_clk: clock-gating-control@d0038 { + compatible = "marvell,dove-gating-clock"; + reg = <0xd0038 0x4>; + clocks = <&core_clk 0>; + #clock-cells = <1>; + }; + uart0: serial@12000 { compatible = "ns16550a"; reg = <0x12000 0x100>; @@ -100,6 +113,7 @@ cell-index = <0>; interrupts = <6>; reg = <0x10600 0x28>; + clocks = <&core_clk 0>; status = "disabled"; }; @@ -110,6 +124,7 @@ cell-index = <1>; interrupts = <5>; reg = <0x14600 0x28>; + clocks = <&core_clk 0>; status = "disabled"; }; @@ -121,6 +136,7 @@ interrupts = <11>; clock-frequency = <400000>; timeout-ms = <1000>; + clocks = <&core_clk 0>; status = "disabled"; }; @@ -128,6 +144,7 @@ compatible = "marvell,dove-sdhci"; reg = <0x92000 0x100>; interrupts = <35>, <37>; + clocks = <&gate_clk 8>; status = "disabled"; }; @@ -135,6 +152,7 @@ compatible = "marvell,dove-sdhci"; reg = <0x90000 0x100>; interrupts = <36>, <38>; + clocks = <&gate_clk 9>; status = "disabled"; }; @@ -142,6 +160,7 @@ compatible = "marvell,orion-sata"; reg = <0xa0000 0x2400>; interrupts = <62>; + clocks = <&gate_clk 3>; nr-ports = <1>; status = "disabled"; }; @@ -152,6 +171,7 @@ <0xc8000000 0x800>; reg-names = "regs", "sram"; interrupts = <31>; + clocks = <&gate_clk 15>; status = "okay"; }; }; |