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author | Matt Porter <mporter@linaro.org> | 2014-03-12 18:07:17 +0400 |
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committer | Matt Porter <mporter@linaro.org> | 2014-03-14 20:22:38 +0400 |
commit | a51b4c0199fd493187e25712c8c3096c3a49c787 (patch) | |
tree | f1e9fbd733ba67d70e0c717516babf76f56dc5dc /arch/arm/boot/dts/bcm59056.dtsi | |
parent | 2eba905e860f8aed5f2743b45259bb2e92548a55 (diff) | |
download | linux-a51b4c0199fd493187e25712c8c3096c3a49c787.tar.xz |
ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap
Add a dtsi to support the BCM590xx PMUs used by the BCM281xx family
of SoCs. Enable regulators for use with the dwc2 and sdhci on
bcm28155-ap.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/bcm59056.dtsi')
-rw-r--r-- | arch/arm/boot/dts/bcm59056.dtsi | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm59056.dtsi b/arch/arm/boot/dts/bcm59056.dtsi new file mode 100644 index 000000000000..dfadaaa89b05 --- /dev/null +++ b/arch/arm/boot/dts/bcm59056.dtsi @@ -0,0 +1,74 @@ +/* +* Copyright 2014 Linaro Limited +* Author: Matt Porter <mporter@linaro.org> +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2 of the License, or (at your +* option) any later version. +*/ + +&pmu { + compatible = "brcm,bcm59056"; + regulators { + rfldo_reg: rfldo { + }; + + camldo1_reg: camldo1 { + }; + + camldo2_reg: camldo2 { + }; + + simldo1_reg: simldo1 { + }; + + simldo2_reg: simldo2 { + }; + + sdldo_reg: sdldo { + }; + + sdxldo_reg: sdxldo { + }; + + mmcldo1_reg: mmcldo1 { + }; + + mmcldo2_reg: mmcldo2 { + }; + + audldo_reg: audldo { + }; + + micldo_reg: micldo { + }; + + usbldo_reg: usbldo { + }; + + vibldo_reg: vibldo { + }; + + csr_reg: csr { + }; + + iosr1_reg: iosr1 { + }; + + iosr2_reg: iosr2 { + }; + + msr_reg: msr { + }; + + sdsr1_reg: sdsr1 { + }; + + sdsr2_reg: sdsr2 { + }; + + vsr_reg: vsr { + }; + }; +}; |