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| author | Arnd Bergmann <arnd@arndb.de> | 2022-05-27 16:56:48 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2022-05-27 16:56:49 +0300 |
| commit | 2ef306e16e7b60b614707272cff4276f7732b25a (patch) | |
| tree | ad8b93a803d568d3093aac2e6a0b2af93e39a7a6 /arch/arm/boot/dts/at91-sama7g5ek.dts | |
| parent | fd82d925f206c5f4db72b1d2da62a2f8086096c5 (diff) | |
| parent | 821cb05f6b4b024847624de0d0e5765c7b09b947 (diff) | |
| download | linux-2ef306e16e7b60b614707272cff4276f7732b25a.tar.xz | |
Merge tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late
AT91 DT #2 for 5.19:
- at91: more DT compliance updates for RTC and RTT nodes
- at91: sama7g5: add microphone support
* tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama7g5ek: add node for PDMC0
ARM: dts: at91: sama7g5: add nodes for PDMC
ARM: dts: at91: Use the generic "rtc" node name for the rtt IPs
ARM: dts: at91: Add the required 'atmel, rtt-rtc-time-reg' property
Link: https://lore.kernel.org/r/20220517153252.92393-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/at91-sama7g5ek.dts')
| -rw-r--r-- | arch/arm/boot/dts/at91-sama7g5ek.dts | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index d83f76a6cd6a..103544620fd7 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -14,6 +14,7 @@ #include <dt-bindings/mfd/atmel-flexcom.h> #include <dt-bindings/input/input.h> #include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/sound/microchip,pdmc.h> / { model = "Microchip SAMA7G5-EK"; @@ -456,7 +457,7 @@ &pinctrl_gmac1_mdio_default &pinctrl_gmac1_phy_irq>; phy-mode = "rmii"; - status = "okay"; + status = "okay"; /* Conflict with pdmc0. */ ethernet-phy@0 { reg = <0x0>; @@ -470,6 +471,17 @@ pinctrl-0 = <&pinctrl_i2s0_default>; }; +&pdmc0 { + #sound-dai-cells = <0>; + microchip,mic-pos = <MCHP_PDMC_DS0 MCHP_PDMC_CLK_NEGATIVE>, /* MIC 1 */ + <MCHP_PDMC_DS1 MCHP_PDMC_CLK_NEGATIVE>, /* MIC 2 */ + <MCHP_PDMC_DS0 MCHP_PDMC_CLK_POSITIVE>, /* MIC 3 */ + <MCHP_PDMC_DS1 MCHP_PDMC_CLK_POSITIVE>; /* MIC 4 */ + status = "disabled"; /* Conflict with gmac1. */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pdmc0_default>; +}; + &pioA { pinctrl_can0_default: can0_default { @@ -639,6 +651,13 @@ bias-disable; }; + pinctrl_pdmc0_default: pdmc0_default { + pinmux = <PIN_PD23__PDMC0_DS0>, + <PIN_PD24__PDMC0_DS1>, + <PIN_PD22__PDMC0_CLK>; + bias_disable; + }; + pinctrl_qspi: qspi { pinmux = <PIN_PB12__QSPI0_IO0>, <PIN_PB11__QSPI0_IO1>, |