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| author | Andrew Jeffery <andrew@aj.id.au> | 2021-06-23 06:38:51 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2021-10-21 09:26:03 +0300 |
| commit | d4efb68f170587cf0decc97f522dee56cfae8cea (patch) | |
| tree | c6a2a2ef7ac442aed5f24d5800345a3827777590 /arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | |
| parent | 2561b4f6ecc741cb96e67c5fe250915548a83bb2 (diff) | |
| download | linux-d4efb68f170587cf0decc97f522dee56cfae8cea.tar.xz | |
ARM: dts: aspeed: p10bmc: Use KCS 3 for MCTP binding
The MCTP LPC driver was loaded by hacking up the compatible in the
devicetree node for KCS 4. With the introduction of the raw KCS driver
this hack is no-longer required. Use the regular compatible string for
KCS 4 and configure the appropriate SerIRQ.
The reset state of the status bits on KCS 4 is inappropriate for the
MCTP LPC binding. Switch to KCS 3 which has a different reset behaviour.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts index ec2abe02e25e..53f8aa5dc1f3 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts @@ -3607,11 +3607,6 @@ memory-region = <&flash_memory>; }; -&kcs4 { - compatible = "openbmc,mctp-lpc"; - status = "okay"; -}; - &mac2 { status = "okay"; pinctrl-names = "default"; @@ -3650,3 +3645,9 @@ status = "okay"; memory-region = <&vga_memory>; }; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; + aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; +}; |