diff options
| author | Tony Lindgren <tony@atomide.com> | 2020-03-04 19:10:43 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-03-04 19:10:43 +0300 |
| commit | 3b6ff6bb5a8a53cf0c29fb51c5f7a14942cff90c (patch) | |
| tree | 4987ade80bb4aa484cec0e2f8b9b068e31cb1670 /arch/arm/boot/dts/am437x-l4.dtsi | |
| parent | c4f4728b03f61b967f4fba023b8aaec6ddaedb46 (diff) | |
| download | linux-3b6ff6bb5a8a53cf0c29fb51c5f7a14942cff90c.tar.xz | |
ARM: dts: Move am437x dss to the interconnect target module in l4
On am437x, the display subsystem (DSS) is on l4. We already have
the interconnect target module for it, so let's just move dss
there.
To do that, we need to adjust the module addresses for the ranges,
and use the ranges already added earlier based on reading the l4
interconnect instance AP registers.
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am437x-l4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am437x-l4.dtsi | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi index e18e17d31272..fdcd792d023c 100644 --- a/arch/arm/boot/dts/am437x-l4.dtsi +++ b/arch/arm/boot/dts/am437x-l4.dtsi @@ -2135,6 +2135,41 @@ <0x00000800 0x0002a800 0x00000400>, <0x00000c00 0x0002ac00 0x00000400>, <0x00001000 0x0002b000 0x00001000>; + + dss: dss@0 { + compatible = "ti,omap3-dss"; + reg = <0 0x200>; + status = "disabled"; + clocks = <&disp_clk>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x00000000 0x00000400>, + <0x00000400 0x00000400 0x00000400>, + <0x00000800 0x00000800 0x00000400>, + <0x00000c00 0x00000c00 0x00000400>, + <0x00001000 0x00001000 0x00001000>; + + dispc: dispc@4000 { + compatible = "ti,omap3-dispc"; + reg = <0x400 0x400>; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "dss_dispc"; + clocks = <&disp_clk>; + clock-names = "fck"; + + max-memory-bandwidth = <230000000>; + }; + + rfbi: rfbi@800 { + compatible = "ti,omap3-rfbi"; + reg = <0x800 0x100>; + ti,hwmods = "dss_rfbi"; + clocks = <&disp_clk>; + clock-names = "fck"; + status = "disabled"; + }; + }; }; target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */ |