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| author | Dave Gerlach <d-gerlach@ti.com> | 2019-12-13 07:17:24 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-02-27 20:33:29 +0300 |
| commit | c3e6fccafd6ecc6f59f63aedcc6dac0f01012c3a (patch) | |
| tree | 60b87a340661dbe37570d8b4758592fd79404fa9 /arch/arm/boot/dts/am33xx.dtsi | |
| parent | 8f38fd5ba6164757065efebe551a0d63220ac58a (diff) | |
| download | linux-c3e6fccafd6ecc6f59f63aedcc6dac0f01012c3a.tar.xz | |
ARM: dts: am33xx: Add idle_states for cpuidle
Add idle_states table for CPU on am335x. Currently just add C1 state
which gates the MPU clock domain.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am33xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am33xx.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 41dcfb37155a..430a634357a1 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -47,6 +47,7 @@ #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a8"; + enable-method = "ti,am3352"; device_type = "cpu"; reg = <0>; @@ -56,6 +57,17 @@ clock-names = "cpu"; clock-latency = <300000>; /* From omap-cpufreq driver */ + cpu-idle-states = <&mpu_gate>; + }; + + idle-states { + mpu_gate: mpu_gate { + compatible = "arm,idle-state"; + entry-latency-us = <40>; + exit-latency-us = <90>; + min-residency-us = <300>; + ti,idle-wkup-m3; + }; }; }; |