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| author | Arnd Bergmann <arnd@arndb.de> | 2020-04-03 23:45:37 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-04-03 23:45:37 +0300 |
| commit | 8bdbf169084ec00833bff61cda0014b7fbdf15ac (patch) | |
| tree | 649873efdce0f9b81d22c8bd042d669bce6c8720 /arch/arm/boot/dts/am33xx.dtsi | |
| parent | fdd41faca6de75737e3cb4a0e86f0723ce36c242 (diff) | |
| parent | 56effbdd2cecd055aef547ed76da83df6fd68d3b (diff) | |
| download | linux-8bdbf169084ec00833bff61cda0014b7fbdf15ac.tar.xz | |
Merge branch 'arm/late' into arm/dt
Include originally "late" updates for OMAP and Qualcomm,
now that it's not late any more.
* arm/late: (122 commits)
ARM: OMAP2+: Drop legacy platform data for ti81xx edma
ARM: dts: Configure interconnect target module for ti816x edma
ARM: dts: Configure interconnect target module for dm814x tptc3
ARM: dts: Configure interconnect target module for dm814x tptc2
ARM: dts: Configure interconnect target module for dm814x tptc1
ARM: dts: Configure interconnect target module for dm814x tptc0
ARM: dts: Configure interconnect target module for dm814x tpcc
ARM: OMAP2+: Drop legacy platform data for dm814x cpsw
ARM: dts: Configure interconnect target module for dm814x cpsw
clk: ti: Fix dm814x clkctrl for ethernet
arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware
arm64: dts: sdm845: add IPA information
arm64: dts: qcom: db845c: add analog audio support
arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s
arm64: dts: qcom: c630: Enable audio support
arm64: dts: qcom: sdm845: add apr nodes
arm64: dts: qcom: sdm845: add slimbus nodes
arm64: dts: qcom: sc7180: Update reg names for SDHC
arm64: dts: qcom: qcs404: Enable CQE support for eMMC
arm64: dts: msm8916: Add fastrpc node
...
Diffstat (limited to 'arch/arm/boot/dts/am33xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am33xx.dtsi | 121 |
1 files changed, 88 insertions, 33 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 430a634357a1..a35f5052d76f 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -205,45 +205,100 @@ reg = <0x48200000 0x1000>; }; - edma: edma@49000000 { - compatible = "ti,edma3-tpcc"; - ti,hwmods = "tpcc"; - reg = <0x49000000 0x10000>; - reg-names = "edma3_cc"; - interrupts = <12 13 14>; - interrupt-names = "edma3_ccint", "edma3_mperr", - "edma3_ccerrint"; - dma-requests = <64>; - #dma-cells = <2>; - - ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, - <&edma_tptc2 0>; - - ti,edma-memcpy-channels = <20 21>; + target-module@49000000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x49000000 0x4>; + reg-names = "rev"; + clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x49000000 0x10000>; + + edma: dma@0 { + compatible = "ti,edma3-tpcc"; + reg = <0 0x10000>; + reg-names = "edma3_cc"; + interrupts = <12 13 14>; + interrupt-names = "edma3_ccint", "edma3_mperr", + "edma3_ccerrint"; + dma-requests = <64>; + #dma-cells = <2>; + + ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, + <&edma_tptc2 0>; + + ti,edma-memcpy-channels = <20 21>; + }; }; - edma_tptc0: tptc@49800000 { - compatible = "ti,edma3-tptc"; - ti,hwmods = "tptc0"; - reg = <0x49800000 0x100000>; - interrupts = <112>; - interrupt-names = "edma3_tcerrint"; + target-module@49800000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x49800000 0x4>, + <0x49800010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; + ti,sysc-midle = <SYSC_IDLE_FORCE>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_SMART>; + clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x49800000 0x100000>; + + edma_tptc0: dma@0 { + compatible = "ti,edma3-tptc"; + reg = <0 0x100000>; + interrupts = <112>; + interrupt-names = "edma3_tcerrint"; + }; }; - edma_tptc1: tptc@49900000 { - compatible = "ti,edma3-tptc"; - ti,hwmods = "tptc1"; - reg = <0x49900000 0x100000>; - interrupts = <113>; - interrupt-names = "edma3_tcerrint"; + target-module@49900000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x49900000 0x4>, + <0x49900010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; + ti,sysc-midle = <SYSC_IDLE_FORCE>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_SMART>; + clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x49900000 0x100000>; + + edma_tptc1: dma@0 { + compatible = "ti,edma3-tptc"; + reg = <0 0x100000>; + interrupts = <113>; + interrupt-names = "edma3_tcerrint"; + }; }; - edma_tptc2: tptc@49a00000 { - compatible = "ti,edma3-tptc"; - ti,hwmods = "tptc2"; - reg = <0x49a00000 0x100000>; - interrupts = <114>; - interrupt-names = "edma3_tcerrint"; + target-module@49a00000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x49a00000 0x4>, + <0x49a00010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; + ti,sysc-midle = <SYSC_IDLE_FORCE>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_SMART>; + clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x49a00000 0x100000>; + + edma_tptc2: dma@0 { + compatible = "ti,edma3-tptc"; + reg = <0 0x100000>; + interrupts = <114>; + interrupt-names = "edma3_tcerrint"; + }; }; target-module@47810000 { |