diff options
| author | Tony Lindgren <tony@atomide.com> | 2022-02-04 10:33:30 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2022-04-11 16:03:32 +0300 |
| commit | c2f2646057bcf3f86a75f6a8aa9fbd159a1d4784 (patch) | |
| tree | 4b5b6fb55e919d0c35fc83e75e5966b7a0db4ee8 /arch/arm/boot/dts/am33xx-clocks.dtsi | |
| parent | 71ff461c3f41f6465434b9e980c01782763e7ad8 (diff) | |
| download | linux-c2f2646057bcf3f86a75f6a8aa9fbd159a1d4784.tar.xz | |
ARM: dts: Add clksel node for am3 ehrpwm
Let's add a clksel node for the component clocks to avoid devicetree
unique_unit_address warnings. The component clocks can now get IO address
from the parent clksel node.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204073333.18175-2-tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am33xx-clocks.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am33xx-clocks.dtsi | 47 |
1 files changed, 27 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi index b7b7106f2dee..e90f148c323c 100644 --- a/arch/arm/boot/dts/am33xx-clocks.dtsi +++ b/arch/arm/boot/dts/am33xx-clocks.dtsi @@ -93,28 +93,35 @@ clock-div = <1>; }; - ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&l4ls_gclk>; - ti,bit-shift = <0>; - reg = <0x0664>; - }; + clock@664 { + compatible = "ti,clksel"; + reg = <0x664>; + #clock-cells = <2>; + #address-cells = <0>; + + ehrpwm0_tbclk: clock-ehrpwm0-tbclk { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clock-output-names = "ehrpwm0_tbclk"; + clocks = <&l4ls_gclk>; + ti,bit-shift = <0>; + }; - ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&l4ls_gclk>; - ti,bit-shift = <1>; - reg = <0x0664>; - }; + ehrpwm1_tbclk: clock-ehrpwm1-tbclk { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clock-output-names = "ehrpwm1_tbclk"; + clocks = <&l4ls_gclk>; + ti,bit-shift = <1>; + }; - ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&l4ls_gclk>; - ti,bit-shift = <2>; - reg = <0x0664>; + ehrpwm2_tbclk: clock-ehrpwm2-tbclk { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clock-output-names = "ehrpwm2_tbclk"; + clocks = <&l4ls_gclk>; + ti,bit-shift = <2>; + }; }; }; &prcm_clocks { |