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authorIcenowy Zheng <icenowy@aosc.io>2019-07-28 06:12:27 +0300
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-08-23 10:14:48 +0300
commit6f002c57c74616ab2bfd236f48bf254c30c5f36a (patch)
tree84fa9d4bb09af3918b27381d65367493c0ecd740 /arch/arm/boot/dts/Makefile
parent11d1bdead79c0df33ba831d307af76730e4c1559 (diff)
downloadlinux-6f002c57c74616ab2bfd236f48bf254c30c5f36a.tar.xz
ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3
Lichee zero plus is a core board made by Sipeed, which includes on-board TF slot or SMT SD NAND, and optional SPI NOR or eMMC, a UART debug header, a microUSB slot and a gold finger connector for expansion. It can use either Sochip S3 or Allwinner S3L SoC. Add the basic device tree for the core board, w/o optional onboard storage, and with S3 SoC. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/Makefile')
-rw-r--r--arch/arm/boot/dts/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9159fa2cea90..e320460a952b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1114,6 +1114,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-r16-nintendo-super-nes-classic.dtb \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
+ sun8i-s3-lichee-zero-plus.dtb \
sun8i-t3-cqa3t-bv3.dtb \
sun8i-v3s-licheepi-zero.dtb \
sun8i-v3s-licheepi-zero-dock.dtb \