From 6f002c57c74616ab2bfd236f48bf254c30c5f36a Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Sun, 28 Jul 2019 11:12:27 +0800 Subject: ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 Lichee zero plus is a core board made by Sipeed, which includes on-board TF slot or SMT SD NAND, and optional SPI NOR or eMMC, a UART debug header, a microUSB slot and a gold finger connector for expansion. It can use either Sochip S3 or Allwinner S3L SoC. Add the basic device tree for the core board, w/o optional onboard storage, and with S3 SoC. Signed-off-by: Icenowy Zheng Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/Makefile') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9159fa2cea90..e320460a952b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1114,6 +1114,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-r16-nintendo-super-nes-classic.dtb \ sun8i-r16-parrot.dtb \ sun8i-r40-bananapi-m2-ultra.dtb \ + sun8i-s3-lichee-zero-plus.dtb \ sun8i-t3-cqa3t-bv3.dtb \ sun8i-v3s-licheepi-zero.dtb \ sun8i-v3s-licheepi-zero-dock.dtb \ -- cgit v1.2.3