diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-11-25 21:21:54 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-11-25 21:21:54 +0300 |
| commit | ca122fe376fc43f7565e3e56e6777d06a433a4cc (patch) | |
| tree | d123dd4be2b62d6c404b676ed259f7cb0c762657 /arch/arc/boot | |
| parent | 5e2fda4776bb94ee47314e71cefaa8a104f8f4ab (diff) | |
| parent | 82385732b1c9d6a22942b5fe6e48a99891cb806f (diff) | |
| download | linux-ca122fe376fc43f7565e3e56e6777d06a433a4cc.tar.xz | |
Merge tag 'arc-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC updates from Vineet Gupta:
- more changes for HS48 cores: supporting MMUv5, detecting new
micro-arch gizmos
- axs10x platform wiring up reset driver merged in this cycle
- ARC perf driver optimizations
* tag 'arc-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: perf: avoid vmalloc backed mmap
ARCv2: perf: optimize given that num counters <= 32
ARCv2: perf: tweak overflow interrupt
ARC: [plat-axs10x] DTS: Add reset controller node to manage ethernet reset
ARCv2: boot log: updates for HS48: dual-issue, ECC, Loop Buffer
ARCv2: Accomodate HS48 MMUv5 by relaxing MMU ver checking
ARC: [plat-axs10x] auto-select AXS101 or AXS103 given the ISA config
Diffstat (limited to 'arch/arc/boot')
| -rw-r--r-- | arch/arc/boot/dts/axs10x_mb.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi index e114000a84f5..74d070cd3c13 100644 --- a/arch/arc/boot/dts/axs10x_mb.dtsi +++ b/arch/arc/boot/dts/axs10x_mb.dtsi @@ -16,6 +16,12 @@ ranges = <0x00000000 0x0 0xe0000000 0x10000000>; interrupt-parent = <&mb_intc>; + creg_rst: reset-controller@11220 { + compatible = "snps,axs10x-reset"; + #reset-cells = <1>; + reg = <0x11220 0x4>; + }; + i2sclk: i2sclk@100a0 { compatible = "snps,axs10x-i2s-pll-clock"; reg = <0x100a0 0x10>; @@ -73,6 +79,8 @@ clocks = <&apbclk>; clock-names = "stmmaceth"; max-speed = <100>; + resets = <&creg_rst 5>; + reset-names = "stmmaceth"; }; ehci@0x40000 { |