summaryrefslogtreecommitdiff
path: root/Documentation
diff options
context:
space:
mode:
authorBjorn Helgaas <bhelgaas@google.com>2024-01-15 21:10:41 +0300
committerBjorn Helgaas <bhelgaas@google.com>2024-01-15 21:10:41 +0300
commit9946bbb3edae01cbd964c0339b3805c0c0b90ec2 (patch)
tree4ecda7b2033edfb8f174bef33394a64c3852620d /Documentation
parenteddcaefa5fec10ce29dfa4edb6b43a1610bd45a3 (diff)
parent41f757713ac38ae2f63bc02d5653aac254c5bdbf (diff)
downloadlinux-9946bbb3edae01cbd964c0339b3805c0c0b90ec2.tar.xz
Merge branch 'pci/dt-bindings'
- Increase qcom iommu-map maxItems to accommodate SDX55 (five entries) and SDM845 (sixteen entries) (Krzysztof Kozlowski) - Describe qcom,pcie-sc8180x clocks and resets accurately (Krzysztof Kozlowski) - Describe qcom,pcie-sm8150 clocks and resets accurately (Krzysztof Kozlowski) - Correct the qcom "reset-name" property, previously incorrectly called "reset-names" (Krzysztof Kozlowski) - Document rockchip optional PCIe reference clock input (Heiko Stuebner) - Document qcom,pcie-sm8650, based on qcom,pcie-sm8550 (Neil Armstrong) * pci/dt-bindings: dt-bindings: PCI: qcom: Document the SM8650 PCIe Controller dt-bindings: PCI: dwc: rockchip: Document optional PCIe reference clock input dt-bindings: PCI: qcom: Correct reset-names property dt-bindings: PCI: qcom: Correct clocks for SM8150 dt-bindings: PCI: qcom: Correct clocks for SC8180x dt-bindings: PCI: qcom: Adjust iommu-map for different SoC
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pci/qcom,pcie.yaml63
-rw-r--r--Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml2
2 files changed, 62 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index eadba38171e1..a93ab3b54066 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -42,6 +42,10 @@ properties:
- qcom,pcie-sm8450-pcie1
- qcom,pcie-sm8550
- items:
+ - enum:
+ - qcom,pcie-sm8650
+ - const: qcom,pcie-sm8550
+ - items:
- const: qcom,pcie-msm8998
- const: qcom,pcie-msm8996
@@ -62,7 +66,8 @@ properties:
maxItems: 8
iommu-map:
- maxItems: 2
+ minItems: 1
+ maxItems: 16
# Common definitions for clocks, clock-names and reset.
# Platform constraints are described later.
@@ -88,7 +93,7 @@ properties:
minItems: 1
maxItems: 12
- resets-names:
+ reset-names:
minItems: 1
maxItems: 12
@@ -483,6 +488,33 @@ allOf:
compatible:
contains:
enum:
+ - qcom,pcie-sc8180x
+ then:
+ properties:
+ clocks:
+ minItems: 8
+ maxItems: 8
+ clock-names:
+ items:
+ - const: pipe # PIPE clock
+ - const: aux # Auxiliary clock
+ - const: cfg # Configuration clock
+ - const: bus_master # Master AXI clock
+ - const: bus_slave # Slave AXI clock
+ - const: slave_q2a # Slave Q2A clock
+ - const: ref # REFERENCE clock
+ - const: tbu # PCIe TBU clock
+ resets:
+ maxItems: 1
+ reset-names:
+ items:
+ - const: pci # PCIe core reset
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
- qcom,pcie-sdm845
then:
oneOf:
@@ -526,8 +558,33 @@ allOf:
compatible:
contains:
enum:
- - qcom,pcie-sc8180x
- qcom,pcie-sm8150
+ then:
+ properties:
+ clocks:
+ minItems: 8
+ maxItems: 8
+ clock-names:
+ items:
+ - const: pipe # PIPE clock
+ - const: aux # Auxiliary clock
+ - const: cfg # Configuration clock
+ - const: bus_master # Master AXI clock
+ - const: bus_slave # Slave AXI clock
+ - const: slave_q2a # Slave Q2A clock
+ - const: tbu # PCIe TBU clock
+ - const: ref # REFERENCE clock
+ resets:
+ maxItems: 1
+ reset-names:
+ items:
+ - const: pci # PCIe core reset
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
- qcom,pcie-sm8250
then:
oneOf:
diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
index 1ae8dcfa072c..5f719218c472 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
@@ -49,6 +49,7 @@ properties:
- description: APB clock for PCIe
- description: Auxiliary clock for PCIe
- description: PIPE clock
+ - description: Reference clock for PCIe
clock-names:
minItems: 5
@@ -59,6 +60,7 @@ properties:
- const: pclk
- const: aux
- const: pipe
+ - const: ref
interrupts:
items: