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authorConor Dooley <conor.dooley@microchip.com>2022-12-05 17:45:25 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2023-01-18 09:05:32 +0300
commit80c200b34ee8a0a3378d2073bd8eaae09651c60e (patch)
treec2a79c8cc05edbb2eae37e0e96481d778602f682 /Documentation/driver-api
parent99e2266f2460e5778560f81982b6301dd2a16502 (diff)
downloadlinux-80c200b34ee8a0a3378d2073bd8eaae09651c60e.tar.xz
RISC-V: resort all extensions in consistent orders
Ordering between each and every list of extensions is wildly inconsistent. Per discussion on the lists pick the following policy: - The array defining order in /proc/cpuinfo follows a narrow interpretation of the ISA specifications, described in a comment immediately presiding it. - All other lists of extensions are sorted alphabetically. This will hopefully allow for easier review & future additions, and reduce conflicts between patchsets as the number of extensions grows. Link: https://lore.kernel.org/all/20221129144742.2935581-2-conor.dooley@microchip.com/ Suggested-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221205144525.2148448-3-conor.dooley@microchip.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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