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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-24 01:51:09 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-24 01:51:09 +0300
commitb39d7efc11b93d9150d99a731db26fd36e2facd2 (patch)
treef2e9aff324f5ed9b3467b794797316280edbbdad /Documentation/devicetree/bindings
parent06e386a1db54ab6a671e103e929b590f7a88f0e3 (diff)
parent8cdc43afbb2cb58692c49fab0b13e2d9439c0642 (diff)
downloadlinux-b39d7efc11b93d9150d99a731db26fd36e2facd2.tar.xz
Merge tag 'pwm/for-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding: "This contains mostly minor bug fixes as well as some new chip support for existing drivers" * tag 'pwm/for-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: mediatek: Add MT7628 support dt-bindings: pwm: Add MT7628 information dt-bindings: pwm: rcar: Add bindings for R-Car E3 support pwm: meson: Fix mux clock names pwm: stm32-lp: Remove useless loop in stm32_pwm_lp_remove() pwm: omap-dmtimer: Return -EPROBE_DEFER if no dmtimer platform data pwm: mxs: Switch to SPDX identifier dt-bindings: pwm: fsl-ftm: Add compatible string for i.MX8QM pwm: fsl-ftm: Enable support for the new SoC i.MX8QM pwm: fsl-ftm: Added the support of per-compatible data pwm: fsl-ftm: Added a dedicated IP interface clock pwm: cros-ec: Switch to SPDX identifier pwm: imx: Switch to SPDX identifier pwm: tiehrpwm: Fix disabling of output of PWMs pwm: tiehrpwm: Don't use emulation mode bits to control PWM output pwm: berlin: Don't use broken prescaler values
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt5
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-mediatek.txt4
-rw-r--r--Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt1
3 files changed, 8 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
index 3899d6a557c1..576ad002bc83 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
@@ -16,7 +16,10 @@ modes in device tree.
Required properties:
-- compatible: Should be "fsl,vf610-ftm-pwm".
+- compatible : should be "fsl,<soc>-ftm-pwm" and one of the following
+ compatible strings:
+ - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610
+ - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM
- reg: Physical base address and length of the controller's registers
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
the cells format.
diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
index ef8bd3cb67ab..991728cb46cb 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
@@ -5,11 +5,13 @@ Required properties:
- "mediatek,mt2712-pwm": found on mt2712 SoC.
- "mediatek,mt7622-pwm": found on mt7622 SoC.
- "mediatek,mt7623-pwm": found on mt7623 SoC.
+ - "mediatek,mt7628-pwm": found on mt7628 SoC.
- reg: physical base address and length of the controller's registers.
- #pwm-cells: must be 2. See pwm.txt in this directory for a description of
the cell format.
- clocks: phandle and clock specifier of the PWM reference clock.
- - clock-names: must contain the following:
+ - clock-names: must contain the following, except for MT7628 which
+ has no clocks
- "top": the top clock generator
- "main": clock used by the PWM core
- "pwm1-8": the eight per PWM clocks for mt2712
diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
index 35a3b9761ee5..e1ef6afbe3a7 100644
--- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
+++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt
@@ -12,6 +12,7 @@ Required Properties:
- "renesas,pwm-r8a7795": for R-Car H3
- "renesas,pwm-r8a7796": for R-Car M3-W
- "renesas,pwm-r8a77965": for R-Car M3-N
+ - "renesas,pwm-r8a77990": for R-Car E3
- "renesas,pwm-r8a77995": for R-Car D3
- reg: base address and length of the registers block for the PWM.
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of