diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-07-23 17:15:49 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-07-25 19:23:23 +0300 |
| commit | 74a6f1e8fb40738e7816c1d16479590e3fbed42d (patch) | |
| tree | add4d655611a7868a0b98c2061b8d72b08eec142 /Documentation/devicetree/bindings | |
| parent | 26910f977c3f966ce0e513ada42c741f243085ce (diff) | |
| download | linux-74a6f1e8fb40738e7816c1d16479590e3fbed42d.tar.xz | |
dt-bindings: usb: qcom,dwc3: drop assigned-clocks
The binding does not have to specify assigned-clocks, because they are
already allowed by core DT schema. On the other hand, fixed
assigned-clocks in the binding will not fit different boards or SoCs.
Exactly this is the case for Qualcomm SuperSpeed DWC3 USB SoC controller
binding, where few boards have different assigned-clocks:
ipq8074-hk10-c1.dtb: usb@8cf8800: assigned-clocks: [[5, 131], [5, 132], [5, 133]] is too long
sdm660-xiaomi-lavender.dtb: usb@a8f8800: assigned-clocks: [[37, 92], [37, 91], [38, 64]] is too long
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230723141550.90223-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 9447b54bfb23..33f299f0685d 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -83,15 +83,6 @@ properties: minItems: 1 maxItems: 9 - assigned-clocks: - items: - - description: Phandle and clock specifier of MOCK_UTMI_CLK. - - description: Phandle and clock specifoer of MASTER_CLK. - - assigned-clock-rates: - items: - - description: Must be 19.2MHz (19200000). - - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode. resets: maxItems: 1 |