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authorChristophe Leroy <christophe.leroy@c-s.fr>2018-09-17 09:22:53 +0300
committerWim Van Sebroeck <wim@linux-watchdog.org>2018-10-13 16:19:39 +0300
commit270c4265f259e4f9695b86b1ded00f7f202ecba4 (patch)
treefbfce2c605d3f189bb56fff23893080b1fa9ff32 /Documentation/devicetree/bindings/watchdog
parent38e48b718934d32d45bb9f917b3430822fca76bb (diff)
downloadlinux-270c4265f259e4f9695b86b1ded00f7f202ecba4.tar.xz
dt-bindings: watchdog: add mpc8xxx-wdt support
Add description of DT bindings for mpc8xxx-wdt driver which handles the CPU watchdog timer on the mpc83xx, mpc86xx and mpc8xx. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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+* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx)
+
+Required properties:
+- compatible: Shall contain one of the following:
+ "mpc83xx_wdt" for an mpc83xx
+ "fsl,mpc8610-wdt" for an mpc86xx
+ "fsl,mpc823-wdt" for an mpc8xx
+- reg: base physical address and length of the area hosting the
+ watchdog registers.
+ On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
+ On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
+ On the 8xx, "General System Interface Unit" area: <0x0 0x10>
+
+Optional properties:
+- reg: additional physical address and length (4) of location of the
+ Reset Status Register (called RSTRSCR on the mpc86xx)
+ On the 83xx, it is located at offset 0x910
+ On the 86xx, it is located at offset 0xe0094
+ On the 8xx, it is located at offset 0x288
+
+Example:
+ WDT: watchdog@0 {
+ compatible = "fsl,mpc823-wdt";
+ reg = <0x0 0x10 0x288 0x4>;
+ };