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| author | Kanak Shilledar <kanakshilledar@gmail.com> | 2024-06-15 05:15:03 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-06-24 23:26:55 +0300 |
| commit | 9ff141042a6204ca69c2adcd0e35705fa2554950 (patch) | |
| tree | 4e93d9b13ce58c06d3b6fc1b0407e19ed9106dc4 /Documentation/devicetree/bindings/riscv | |
| parent | 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff) | |
| download | linux-9ff141042a6204ca69c2adcd0e35705fa2554950.tar.xz | |
dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschema
Convert the RISC-V Hart-Level Interrupt Controller (HLIC) to newer
DT schema, Created DT schema based on the .txt file which had
`compatible`, `#interrupt-cells` and `interrupt-controller` as
required properties.
Changes made with respect to original file:
- Changed the example to just use interrupt-controller instead of
using the whole cpu block
- Changed the example compatible string.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com>
Link: https://lore.kernel.org/r/20240615021507.122035-2-kanakshilledar@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'Documentation/devicetree/bindings/riscv')
0 files changed, 0 insertions, 0 deletions