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authorFabrice Gasnier <fabrice.gasnier@st.com>2019-06-19 12:52:01 +0300
committerThierry Reding <thierry.reding@gmail.com>2019-06-25 15:53:48 +0300
commit69252ec16596ae679bbfc29dfe64682c17ea4dc0 (patch)
tree6d492496b722709c54231f288a51ba5d29502e23 /Documentation/devicetree/bindings/pwm
parentb2c200e3f2fd1158f5f1c93ccb2e0a27d96c4a7a (diff)
downloadlinux-69252ec16596ae679bbfc29dfe64682c17ea4dc0.tar.xz
dt-bindings: pwm: stm32: Add #pwm-cells
STM32 Timers support generic 3 cells PWM bindings to encode PWM number, period and polarity as defined in pwm.txt. Fixes: cd9a99c2f8e8 ("dt-bindings: pwm: Add STM32 bindings") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm')
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-stm32.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
index 3e6d55018d7a..a8690bfa5e1f 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
@@ -8,6 +8,8 @@ Required parameters:
- pinctrl-names: Set to "default".
- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module.
For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
+- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
+ bindings defined in pwm.txt.
Optional parameters:
- st,breakinput: One or two <index level filter> to describe break input configurations.
@@ -28,6 +30,7 @@ Example:
pwm {
compatible = "st,stm32-pwm";
+ #pwm-cells = <3>;
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
st,breakinput = <0 1 5>;