diff options
author | John Crispin <blogic@openwrt.org> | 2016-01-03 18:26:04 +0300 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2016-01-20 02:39:20 +0300 |
commit | 663148e48a661d759369b726261d160486b68e75 (patch) | |
tree | a35da6fe35ff83d7f243f86c0d2be76c8ab74523 /Documentation/devicetree/bindings/net/ralink,rt2880-net.txt | |
parent | 3d1f664ab940382e7faa597fdfefed4acb163afc (diff) | |
download | linux-663148e48a661d759369b726261d160486b68e75.tar.xz |
Documentation: DT: net: add docs for ralink/mediatek SoC ethernet binding
Add three files. ralink,rt2880-net.txt descibes the actual frame engine
and the other two describe the switch forntend bindings.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Michael Lee <igvtee@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-mediatek@lists.infradead.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Felix Fietkau <nbd@nbd.name>
Cc: Michael Lee <igvtee@gmail.com>
Cc: steven.liu@mediatek.com
Cc: Fred.Chang@mediatek.com
Patchwork: https://patchwork.linux-mips.org/patch/11970/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'Documentation/devicetree/bindings/net/ralink,rt2880-net.txt')
-rw-r--r-- | Documentation/devicetree/bindings/net/ralink,rt2880-net.txt | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt new file mode 100644 index 000000000000..88b095d1f13b --- /dev/null +++ b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt @@ -0,0 +1,61 @@ +Ralink Frame Engine Ethernet controller +======================================= + +The Ralink frame engine ethernet controller can be found on Ralink and +Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8). + +Depending on the SoC, there is a number of ports connected to the CPU port +directly and/or via a (gigabit-)switch. + +* Ethernet controller node + +Required properties: +- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth", + "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth", + "mediatek,mt7620-eth", "mediatek,mt7621-eth" +- reg: Address and length of the register set for the device +- interrupt-parent: Should be the phandle for the interrupt controller + that services interrupts for this device +- interrupts: Should contain the frame engines interrupt +- resets: Should contain the frame engines resets +- reset-names: Should contain the reset names "fe". If a switch is present + "esw" is also required. + + +* Ethernet port node + +Required properties: +- compatible: Should be "ralink,eth-port" +- reg: The number of the physical port +- phy-handle: reference to the node describing the phy + +Example: + +mdio-bus { + ... + phy0: ethernet-phy@0 { + phy-mode = "mii"; + reg = <0>; + }; +}; + +ethernet@400000 { + compatible = "ralink,rt2880-eth"; + reg = <0x00400000 10000>; + + #address-cells = <1>; + #size-cells = <0>; + + resets = <&rstctrl 18>; + reset-names = "fe"; + + interrupt-parent = <&cpuintc>; + interrupts = <5>; + + port@0 { + compatible = "ralink,eth-port"; + reg = <0>; + phy-handle = <&phy0>; + }; + +}; |