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author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2022-10-10 08:30:23 +0300 |
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committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2022-10-10 08:30:23 +0300 |
commit | 5f8f8574c7f5585b09a9623f0f13462e4eb67b4d (patch) | |
tree | 8f1d5e88bf9604a9e39fbcce0e37b3d8cee451bb /Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | |
parent | e62563db857f81d75c5726a35bc0180bed6d1540 (diff) | |
parent | fe5b6aaef72a0f7daa06e7960e0bee45c2984e41 (diff) | |
download | linux-5f8f8574c7f5585b09a9623f0f13462e4eb67b4d.tar.xz |
Merge branch 'next' into for-linus
Prepare input updates for 6.1 merge window.
Diffstat (limited to 'Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml index 8880b834f264..d036675e0779 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml @@ -45,10 +45,9 @@ properties: description: | - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" and a core clock reference, as defined in - <dt-bindings/clock/r9a0*-cpg.h> + <dt-bindings/clock/r9a0*-cpg.h>, - For module clocks, the two clock specifier cells must be "CPG_MOD" and - a module number, as defined in the <dt-bindings/clock/r9a07g0*-cpg.h> or - <dt-bindings/clock/r9a09g011-cpg.h>. + a module number, as defined in <dt-bindings/clock/r9a0*-cpg.h>. const: 2 '#power-domain-cells': @@ -62,7 +61,7 @@ properties: '#reset-cells': description: The single reset specifier cell must be the module number, as defined in - the <dt-bindings/clock/r9a07g0*-cpg.h> or <dt-bindings/clock/r9a09g011-cpg.h>. + <dt-bindings/clock/r9a0*-cpg.h>. const: 1 required: |