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authorArnd Bergmann <arnd@arndb.de>2018-03-27 16:42:18 +0300
committerArnd Bergmann <arnd@arndb.de>2018-03-27 16:42:18 +0300
commit8650b9feb0d8e7e9cc79ca118e1bb606188de899 (patch)
tree03431180eb6fe74ec282c9af3c02be6845dd8d5d /Documentation/devicetree/bindings/arm
parent63fdfbf5a76e175ad0476c8fed9db98fe9758b88 (diff)
parent99e3a1e6fedd3b8713a1398772ad7da3796c6908 (diff)
downloadlinux-8650b9feb0d8e7e9cc79ca118e1bb606188de899.tar.xz
Merge tag 'sunxi-core-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Pull "Allwinner core changes for 4.17" from Maxime Ripard: Here is our bunch of changes for mach-sunxi for this release cycle. This is basically only about bringing the SMP support to the A80, which has a bug in hardware and cannot use PSCI like the other SoCs we have. * tag 'sunxi-core-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: sunxi: mc-smp: Split out SoC-specific device node lookup sequence ARM: sunxi: mc-smp: Use DT enable-method for sun9i A80 SMP ARM: sunxi: mc-smp: Fix "lookback" typo ARM: sun9i: smp: Support cpu0 hotplug dt-bindings: ARM: sunxi: Document A80 SoC secure SRAM usage by SMP hotplug ARM: sun9i: smp: Support CPU/cluster power down and hotplugging for cpu1~7 ARM: sun9i: Support SMP bring-up on A80
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.txt1
-rw-r--r--Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt44
2 files changed, 45 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index f4a777039f03..76655d0d67c2 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -198,6 +198,7 @@ described below.
"actions,s500-smp"
"allwinner,sun6i-a31"
"allwinner,sun8i-a23"
+ "allwinner,sun9i-a80-smp"
"amlogic,meson8-smp"
"amlogic,meson8b-smp"
"arm,realview-smp"
diff --git a/Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt b/Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt
new file mode 100644
index 000000000000..082e6a9382d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt
@@ -0,0 +1,44 @@
+Allwinner SRAM for smp bringup:
+------------------------------------------------
+
+Allwinner's A80 SoC uses part of the secure sram for hotplugging of the
+primary core (cpu0). Once the core gets powered up it checks if a magic
+value is set at a specific location. If it is then the BROM will jump
+to the software entry address, instead of executing a standard boot.
+
+Therefore a reserved section sub-node has to be added to the mmio-sram
+declaration.
+
+Note that this is separate from the Allwinner SRAM controller found in
+../../sram/sunxi-sram.txt. This SRAM is secure only and not mappable to
+any device.
+
+Also there are no "secure-only" properties. The implementation should
+check if this SRAM is usable first.
+
+Required sub-node properties:
+- compatible : depending on the SoC this should be one of:
+ "allwinner,sun9i-a80-smp-sram"
+
+The rest of the properties should follow the generic mmio-sram discription
+found in ../../misc/sram.txt
+
+Example:
+
+ sram_b: sram@20000 {
+ /* 256 KiB secure SRAM at 0x20000 */
+ compatible = "mmio-sram";
+ reg = <0x00020000 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00020000 0x40000>;
+
+ smp-sram@1000 {
+ /*
+ * This is checked by BROM to determine if
+ * cpu0 should jump to SMP entry vector
+ */
+ compatible = "allwinner,sun9i-a80-smp-sram";
+ reg = <0x1000 0x8>;
+ };
+ };