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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-04-12 14:27:28 +0300 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-05-29 16:54:42 +0300 |
| commit | fee3d8eeca1a9121fff0436937b606affdbcfe7a (patch) | |
| tree | 45917662d4e15e48cf14de0d4948caafd9c27cd5 | |
| parent | 1e5b6725199f276b02be8539b7545e1553cfd61e (diff) | |
| download | linux-fee3d8eeca1a9121fff0436937b606affdbcfe7a.tar.xz | |
arm64: dts: mediatek: mt6795: Add support for the CMDQ/GCE mailbox
In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230412112739.160376-17-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt6795.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index 17019fbea0af..a754355aad8c 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mediatek,mt6795-clk.h> +#include <dt-bindings/gce/mediatek,mt6795-gce.h> #include <dt-bindings/pinctrl/mt6795-pinfunc.h> #include <dt-bindings/power/mt6795-power.h> #include <dt-bindings/reset/mediatek,mt6795-resets.h> @@ -401,6 +402,15 @@ status = "disabled"; }; + gce: mailbox@10212000 { + compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce"; + reg = <0 0x10212000 0 0x1000>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + #mbox-cells = <2>; + }; + gic: interrupt-controller@10221000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; |