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authorMark Rutland <mark.rutland@arm.com>2021-05-24 11:29:44 +0300
committerWill Deacon <will@kernel.org>2021-05-25 21:27:48 +0300
commite89d6cc51034998607502cd3899173bfa7189571 (patch)
tree9819876c0b2a98ec70eab91e9c076fa3a61d03e0
parentc4681547bcce777daf576925a966ffa824edd09d (diff)
downloadlinux-e89d6cc51034998607502cd3899173bfa7189571.tar.xz
arm64: assembler: replace `kaddr` with `addr`
The `__dcache_op_workaround_clean_cache` and `dcache_by_line_op` macros are only expected to be usedc on kernel memory, without a user fault fixup, and so we named their address variables `kaddr` to make this clear. Subseuqent patches will modify these to also work on user memory with an (optional) user fault fixup, where `kaddr` won't make as much sense. To aid the legibility of patches, this patch (only) replaces `kaddr` with `addr` as a preparatory step. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Fuad Tabba <tabba@google.com> Cc: Ard Biesheuvel <aedb@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Fuad Tabba <tabba@google.com> Cc: Will Deacon <will@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20210524083001.2586635-2-tabba@google.com Signed-off-by: Will Deacon <will@kernel.org>
-rw-r--r--arch/arm64/include/asm/assembler.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 8418c1bd8f04..6a0fbc599196 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -377,47 +377,47 @@ alternative_cb_end
/*
* Macro to perform a data cache maintenance for the interval
- * [kaddr, kaddr + size)
+ * [addr, addr + size)
*
* op: operation passed to dc instruction
* domain: domain used in dsb instruciton
- * kaddr: starting virtual address of the region
+ * addr: starting virtual address of the region
* size: size of the region
- * Corrupts: kaddr, size, tmp1, tmp2
+ * Corrupts: addr, size, tmp1, tmp2
*/
- .macro __dcache_op_workaround_clean_cache, op, kaddr
+ .macro __dcache_op_workaround_clean_cache, op, addr
alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE
- dc \op, \kaddr
+ dc \op, \addr
alternative_else
- dc civac, \kaddr
+ dc civac, \addr
alternative_endif
.endm
- .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
+ .macro dcache_by_line_op op, domain, addr, size, tmp1, tmp2
dcache_line_size \tmp1, \tmp2
- add \size, \kaddr, \size
+ add \size, \addr, \size
sub \tmp2, \tmp1, #1
- bic \kaddr, \kaddr, \tmp2
+ bic \addr, \addr, \tmp2
9998:
.ifc \op, cvau
- __dcache_op_workaround_clean_cache \op, \kaddr
+ __dcache_op_workaround_clean_cache \op, \addr
.else
.ifc \op, cvac
- __dcache_op_workaround_clean_cache \op, \kaddr
+ __dcache_op_workaround_clean_cache \op, \addr
.else
.ifc \op, cvap
- sys 3, c7, c12, 1, \kaddr // dc cvap
+ sys 3, c7, c12, 1, \addr // dc cvap
.else
.ifc \op, cvadp
- sys 3, c7, c13, 1, \kaddr // dc cvadp
+ sys 3, c7, c13, 1, \addr // dc cvadp
.else
- dc \op, \kaddr
+ dc \op, \addr
.endif
.endif
.endif
.endif
- add \kaddr, \kaddr, \tmp1
- cmp \kaddr, \size
+ add \addr, \addr, \tmp1
+ cmp \addr, \size
b.lo 9998b
dsb \domain
.endm