diff options
| author | Yifan Zhang <yifan1.zhang@amd.com> | 2024-02-06 18:06:53 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-02-16 23:42:03 +0300 |
| commit | dc84f52eb26ddffc345d9c1e1d660df179b77371 (patch) | |
| tree | 360612bf0de7732cb2fe47ad935948676f613e6d | |
| parent | 34a1de0f79352086884553f78db271f957a98583 (diff) | |
| download | linux-dc84f52eb26ddffc345d9c1e1d660df179b77371.tar.xz | |
drm/amdgpu/nbio: Add NBIO 7.11.1 Support
Fix up doorbell setup and clockgating.
v2: squash in fixes (Alex)
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc21.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h | 2 |
3 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c index 1f52b4b1db03..05020141c0ae 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c @@ -89,7 +89,9 @@ static void nbio_v7_11_vpe_doorbell_range(struct amdgpu_device *adev, int instan bool use_doorbell, int doorbell_index, int doorbell_size) { - u32 reg = SOC15_REG_OFFSET(NBIO, 0, regGDC0_BIF_VPE_DOORBELL_RANGE); + u32 reg = instance == 0 ? + SOC15_REG_OFFSET(NBIO, 0, regGDC0_BIF_VPE_DOORBELL_RANGE) : + SOC15_REG_OFFSET(NBIO, 0, regGDC0_BIF_VPE1_DOORBELL_RANGE); u32 doorbell_range = RREG32_PCIE_PORT(reg); if (use_doorbell) { @@ -112,7 +114,10 @@ static void nbio_v7_11_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, int doorbell_index, int instance) { - u32 reg = SOC15_REG_OFFSET(NBIO, 0, regGDC0_BIF_VCN0_DOORBELL_RANGE); + u32 reg = instance == 0 ? + SOC15_REG_OFFSET(NBIO, 0, regGDC0_BIF_VCN0_DOORBELL_RANGE): + SOC15_REG_OFFSET(NBIO, 0, regGDC0_BIF_VCN1_DOORBELL_RANGE); + u32 doorbell_range = RREG32_PCIE_PORT(reg); if (use_doorbell) { diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c index 917292df55a5..5f81c264e310 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc21.c +++ b/drivers/gpu/drm/amd/amdgpu/soc21.c @@ -866,6 +866,7 @@ static int soc21_common_set_clockgating_state(void *handle, case IP_VERSION(7, 7, 0): case IP_VERSION(7, 7, 1): case IP_VERSION(7, 11, 0): + case IP_VERSION(7, 11, 1): adev->nbio.funcs->update_medium_grain_clock_gating(adev, state == AMD_CG_STATE_GATE); adev->nbio.funcs->update_medium_grain_light_sleep(adev, diff --git a/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h index 6f80bfa7e41a..5ebe4cb40f9d 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h @@ -8900,6 +8900,8 @@ #define regGDC0_BIF_IH_DOORBELL_RANGE_BASE_IDX 3 #define regGDC0_BIF_VCN0_DOORBELL_RANGE 0x4f0af3 #define regGDC0_BIF_VCN0_DOORBELL_RANGE_BASE_IDX 3 +#define regGDC0_BIF_VPE1_DOORBELL_RANGE 0x4f0af4 +#define regGDC0_BIF_VPE1_DOORBELL_RANGE_BASE_IDX 3 #define regGDC0_BIF_RLC_DOORBELL_RANGE 0x4f0af5 #define regGDC0_BIF_RLC_DOORBELL_RANGE_BASE_IDX 3 #define regGDC0_BIF_SDMA2_DOORBELL_RANGE 0x4f0af6 |