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| author | Dave Airlie <airlied@redhat.com> | 2012-06-27 11:35:52 +0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2012-07-20 06:28:44 +0400 |
| commit | cdcac9cd7741af2c2b9255cbf060f772596907bb (patch) | |
| tree | 0e8eb76992a020eb2be74aa6a57f358d0c42a036 | |
| parent | 440a7cd87e2bea9b8cf7b8b07aecad9c2f8638dd (diff) | |
| download | linux-cdcac9cd7741af2c2b9255cbf060f772596907bb.tar.xz | |
pci_regs: define LNKSTA2 pcie cap + bits.
We need these for detecting the max link speed for drm drivers.
Acked-by: Bjorn Helgaas <bhelgass@google.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
| -rw-r--r-- | include/linux/pci_regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 4b608f543412..7f04132eb02d 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -521,6 +521,11 @@ #define PCI_EXP_OBFF_MSGA_EN 0x2000 /* OBFF enable with Message type A */ #define PCI_EXP_OBFF_MSGB_EN 0x4000 /* OBFF enable with Message type B */ #define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */ +#define PCI_EXP_LNKCAP2 44 /* Link Capability 2 */ +#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */ +#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */ +#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x04 /* Current Link Speed 8.0GT/s */ +#define PCI_EXP_LNKCAP2_CROSSLINK 0x100 /* Crosslink supported */ #define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ #define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */ |