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authorChunming Zhou <David1.Zhou@amd.com>2016-07-22 08:01:02 +0300
committerAlex Deucher <alexander.deucher@amd.com>2016-07-29 21:37:05 +0300
commitbdc2eea4722b96f54edb7588078540505b5ac096 (patch)
tree8a0f5e79e5396a0b1802126fc3ca8b244adaebb3
parentcd437e37cb836805604d8b607a28ee6769d800ef (diff)
downloadlinux-bdc2eea4722b96f54edb7588078540505b5ac096.tar.xz
drm/amd: reset hw count when reset job
Means the hw ring is empty after gpu reset. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/scheduler/gpu_scheduler.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
index 70ff09d10885..21c49d38fcb3 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
@@ -393,6 +393,7 @@ void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched)
s_job->s_fence->parent = NULL;
}
}
+ atomic_set(&sched->hw_rq_count, 0);
spin_unlock(&sched->job_list_lock);
}
@@ -410,6 +411,8 @@ void amd_sched_job_recovery(struct amd_gpu_scheduler *sched)
list_for_each_entry(s_job, &sched->ring_mirror_list, node) {
struct amd_sched_fence *s_fence = s_job->s_fence;
struct fence *fence = sched->ops->run_job(s_job);
+
+ atomic_inc(&sched->hw_rq_count);
if (fence) {
s_fence->parent = fence_get(fence);
r = fence_add_callback(fence, &s_fence->cb,